Market speculations rumored that TSMC might cut its capital expenditure for next year to USD 28-30 billion. This potential reduction, ranging from 6.3% to 12.5% compared to this year, is attributed to the shared use of certain process equipment and the utilization of deferred budgets from the current year. If realized, this would mark the lowest capital expenditure point in nearly four years. Additionally, it could impact the order volumes for equipment & testing-related companies, influencing the overall order dynamics in the supply chain for the upcoming year, reported by UDN News.

Responding to the speculations about a decrease in next year’s capital expenditure, TSMC stated on the December 4th that regarding next year’s capital expenditure will be officially disclosed during the January 2024 conference. Despite the potential moderation in capital expenditure, industry observers anticipate continued growth in R&D investment, particularly in advanced process technology.

Industry sources suggest that TSMC’s R&D investment in advanced process technology will persist in its growth trajectory for the next year. Notably, approximately 80% of the equipment for the 3nm advanced process can be shared with the 5nm and 7nm processes. The focus of next year’s capital expenditure is expected to be on investments in the 3nm and below advanced processes and mask technology.

Meanwhile, mature processes will bring a rise in the share of specialty processes and equipment modifications for advanced packaging.

During 2023Q3 earnings call in October, TSMC set a cautious tone, citing uncertainties in the short-term market. The company maintained this year’s capital expenditure at nearly USD 32 billion, adopting a prudent approach to investment.

On the other hand, ASML, the global leader in semiconductor lithography technology, recently released its financial report. The forecast indicates that 2024 will be a transitional year, with expected revenue similar to that of 2023. This cautious outlook aligns with the semiconductor industry’s current phase of experiencing the bottom of the cycle.

(Image: TSMC)

In the previous articles (China Strives to Break Through U.S. Restrictions in Mature Processes, Aiming for Over 30% Global Share by 2027 and China’s Wafer Fabs Hits 44 with Future Expansion 32, Mainly Targeting on The Mature Process) we explored the overall layout of Chinese wafer fab and developments in 12-inch and 8-inch wafer foundries. This article shifts to navigating the challenges of preventing oversupply while strategically pushing forward in the realm of mature processes.

Due to the counterattack of international giants in mature processes leads to fierce competition for orders, the recent surge in mature processes over the past two years in fact has brought pressure to Chinese wafer fabs. From the perspective of the industry chain, it may also cause industry overcapacity.

The popularity of mature processes can be traced back to its extensive application market, research and development of advanced processes approaching the limit of Moore’s Law.

No need to say it also reflects the regular operation of market dynamics. In the current economic downturn, the demand for automotive electronics and industrial control systems(ICS) is booming, with 80% of their demand falling under mature processes. As the AI trend rises, many high-end AI and computing chips in China cannot adopt advanced processes, prompting a reconsideration of design changes to use multiple mature process chips instead of a single high-end process chip. This not only ensures shipments but also indirectly increases the synchronous multiplier of mature process chips.

Can Specialty Processes Become a Blue Ocean for China?

With the emergence of new demands in downstream application scenarios, the variety of semiconductor products continues to increase. Industry insiders state that global foundries are competing to target mature process wafer foundries. In this context, Chinese wafer fabs should focus on creating differentiation.

Therefore, specialty processes are gradually gaining attention in the current development of wafer foundries. In comparison to advanced logic processes, specialty processes particularly emphasize the research, innovation, and application of new materials (SiC and GaN are currently popular), new structures, and new devices. Specialty processes highlight wafer processes with custom capabilities for special IP and diverse technological categories. This is considered an important development branch beyond Moore’s Law, which involves continually reducing the linewidth to enhance chip integration.

Specialty process product categories are extensive and can form a competitive advantage in specific areas. These mainly include embedded/independent non-volatile memory, power devices, analog and power management, sensors, and other process platforms.

Representative enterprises in China’s specialty process industry include SMIC, Huarun Microelectronics, and Huahong Group. These companies attach great importance to the development of specialty processes. To meet the differentiated demands for product functionality and performance in the market, enterprises continually research and innovate wafer manufacturing process technologies, evolving into differentiated manufacturing processes.

For example, Huahong Semiconductor’s specialty processes include power management, radio frequency, power devices, and other platforms, especially in wafer foundry for power devices; Huarun focuses on high-voltage power BCD, high-performance BCD, high-reliability BCD, high-precision analog, MEMS, and six major special power device simulation wafer foundry processes.

Major wafer foundries have always attached great importance to the development of specialty processes. TSMC’s specialty process is leading by far, while GlobalFoundries and UMC are also focusing on mature processes and specialty processes. It is not difficult to predict that there will be fewer and fewer participants chasing advanced processes in the future, and new entrants will compete for the market in specialty processes.
(Image: SMIC)