News
Qualcomm was fined NTD 23.4 billion by Taiwan’s Fair Trade Commission in 2017 for antitrust violations. Both parties reached a settlement the following year, which sparked some official discontent. However, a report from Korean media outlet The Elec has pointed out that this move ultimately contributed to Taiwan’s long-term industrial growth.
Under the settlement in the subsequent year, Qualcomm reportedly committed to investing USD 700 million in Taiwan over the next five years. This included establishing operational and manufacturing facilities, testing centers, and other investments, with the plan set to conclude by the end of 2023.
Qualcomm was accused of leveraging modem chip patents to force companies into unfavorable licensing agreements, resulting in fines in Taiwan, China (2015), South Korea (2016), and the EU (2018). Taiwan initially imposed a fine of NTD 23.4 billion on Qualcomm but later reduced it, instead requiring Qualcomm to commit to investing USD 700 million over the next five years to promote local industries such as 5G.
The report points out that, at that time, Taiwan lagged behind the US, China, Japan, and South Korea in 5G development, necessitating this compromise. The reports suggest that this decision, which now appears to be correct, was not intended to boost the 5G industry but to pivot towards the semiconductor sector. Over the past five years, industry dynamics have rapidly shifted focus to the semiconductor sector, with Qualcomm channeling substantial funds into Taiwan’s chip packaging industry.
Taiwanese officials reportedly stated that Qualcomm has successfully implemented its industrial investment plan over the past five years while maintaining a strong relationship with Taiwan. All aspects of the promised investment have been fulfilled, with the investment amount exceeding USD 1.4 billion, far surpassing the initial commitment of USD 700 million—effectively doubling Qualcomm’s investment amount.
Reports further indicate that Siliconware Precision Industries (SPIL) has confirmed Qualcomm’s purchase of 500 pieces of equipment dedicated to handling Qualcomm’s backend demands. Additionally, a South Korean packaging company informed TheElec that they lost Qualcomm orders to Taiwanese competitors over the past few years. In essence, Taiwan’s government initiative has also benefited the local packaging industry, despite this not being the original intention.
While SPIL’s performance was weak during the global chip market downturn last year, its revenue steadily grew from 2018 to 2022. Qualcomm not only provides equipment and orders to SPIL but also deploys engineers directly at SPIL’s plants to ensure proper chip packaging.
Qualcomm continues to entrust its high-end chip packaging orders to Amkor’s Incheon plant. However, the report suggests that Qualcomm’s close partnership with Taiwanese packaging companies may lead to more opportunities.
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(Photo credit: Qualcomm)
News
As American tech giants depart from China and relocate their production of artificial intelligence (AI) server to Mexico, according to a report from UDN, some major AI players have urged their Taiwanese manufacturing partners to enhance their investments in production in Mexico.
Reportedly, Taiwanese manufacturing giants like Foxconn and Inventec are increasingly attentive to this trend, ramping up their investments in Mexico and leveraging the advantages provided by the US-Mexico-Canada Agreement (USMCA) that came into effect in 2020.
As per a report by The Wall Street Journal, the USMCA has already attracted billions of dollars in investment in the manufacturing sector, aimed at shifting production operations from China to Mexico.
James C. F. Huang, from the Taiwan External Trade Development Council, stated that the three North American countries aim to minimize imports from Asia as much as possible. Based on this consensus, Mexico is expected to become the most significant production base within the USMCA for the production of goods.
In February, Foxconn, the world’s largest electronics manufacturing services provider, announced a USD 27 million investment in purchasing land in the western state of Jalisco, Mexico. According to the report citing sources, this move is aimed at significantly expanding the company’s production of AI servers. Foxconn stated that it has invested approximately USD 690 million in Mexico over the past four years.
Sources cited by UDN also revealed that Foxconn’s Mexican facility manufactures AI servers for American tech giants such as Amazon, Google, Microsoft, and NVIDIA. However, the US companies have declined to confirm this claim.
Last year, the chairman of Mexico’s largest private organization, Francisco Cervantes, pointed out that increased investment by Taiwanese businesses in Mexico will significantly reshape the country’s industrial structure over the next decade.
The production volume of AI server is on the rise, and American companies are hoping to avoid repeating the history of smartphones. Many core components and parts of smartphones ended up being produced in China, particularly in factories operated by companies like Foxconn, for the assembly of iPhones.
Foxconn’s Chairman Young Liu previously indicated a strong demand for AI servers, with Foxconn securing new projects continuously.
Foxconn spokesperson James Wu noted that Foxconn Group commands over 40% market share in the server industry, particularly in the mid-to-high-end products related to AI servers. Foxconn closely collaborates with customers and aims to maintain its dominance, anticipating substantial contributions once the entire supply chain stabilizes.
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(Photo credit: Foxconn)
News
Weak demand in mature process has triggered another wave of foundries’ price reductions. According to a report from Economic Daily News citing industry sources, some foundries have been continuously adjusting their quotes for mature process downward by single-digit percentages (4% to 6%) this quarter.
With mature process production capacity continuing to expand in China, it is reportedly estimated that prices may decrease further in the second quarter, leading to a cumulative reduction of around 10% for the first half of the year.
Overview of Foundries’ Price Reductions in Mature Process
According to the same report citing sources, IC design companies that previously tape out to Chinese foundries primarily focused on driver ICs. However, recently, some power management IC companies have gradually increased orders to Chinese foundries. Currently, the price difference between foundry services in Taiwan and China can be as high as 20% to 30%.
Regarding this wave of price reductions in mature process, an unnamed sources from the IC design industry cited by the report disclosed that the price reduction for Taiwanese foundries is at least in the low single-digit percentage range (1% to 3%), while for Chinese foundries, it is in the mid-single-digit percentage range (4% to 6%). If the order volume is large, prices can be negotiated even lower, or different discount methods may be available.
Reportedly, as Chinese foundries continue to increase their production capacity for mature process, supported by subsidies from the Chinese government, they maintain considerable flexibility in pricing strategies. As long as customers are willing to provide a certain quantity of orders, prices above the variable costs can be negotiated. Therefore, there is indeed room for further price reductions in the second quarter.
Regarding mature process, IC design companies cited in the report mention that the high-demand 28-nanometer process still faces supply shortages and may even see price increases. However, for the 40-nanometer and 55-nanometer processes, where the increase in production capacity outpaces the return of demand, price reductions are essentially the only option.
With China’s significant investment in mature nodes, it is positioned at a time when the global chip industry is poised for recovery. According to a recent TrendForce’s data, China currently has 44 operational fabs, with an additional 22 under construction. By the end of 2024, 32 Chinese fabs will expand their capacity for 28-nanometer and older mature chips.
TrendForce predicts that by 2027, China’s share of mature process capacity in the global market will increase from 31% in 2023 to 39%, with further growth potential if equipment procurement progresses smoothly.
However, compared to the proactive pricing strategies adopted by Chinese foundries, Taiwanese foundries have been relatively firm in their pricing.
For example, TSMC emphasizes that while it has faced significant pricing pressure from counterparts in China recently, the company is not prepared to engage in a price war. Instead, it anticipates seizing opportunities to attract orders from European and American clients. TSMC aims for moderate growth this year.
Regarding IC pricing, IC design companies cited by the report acknowledge that although their IC production costs have decreased, customers also demand price reductions. Caught between customers and foundries, both of which are larger in scale than IC design companies, it is difficult to predict how well operations will perform this year amidst ongoing challenges.
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(Photo credit: TSMC)
Insights
“It is not the shortage of AI chips, it is the shortage of our CoWoS capacity,” replied TSMC Chairman Mark Liu during an interview in September last year, propelling this technology that TSMC had quietly cultivated for over a decade into a global spotlight.
As per a report from TechNews, the hardware demand sparked by generative AI has also led to “advanced packaging” becoming not only a hot keyword pursued by global investors but also a prominent feature of the semiconductor industry. From foundries and memory manufacturers to OASTs, all are actively involved in the research and capacity expansion of advanced packaging technologies.
TSMC, the leading force in the advanced packaging market, has repeatedly emphasized its efforts to expand capacity during its earnings call, including capacity expansions in Zhunan and Hsinchu, and even the possibility of constructing advanced packaging facilities in Chiayi.
Intel’s strategic moves also underscore its emphasis on the development of advanced packaging. Intel’s new plant completed in Penang, Malaysia in 2023 is aimed at establishing advanced packaging capacity.
Leading packaging and testing company, ASE Technology Holding, has also actively participated in the competition for advanced packaging. Apart from its subsidiary, Siliconware Precision Industries (SPIL), which is already a supplier for the backend packaging of CoWoS, ASE Technology Holding is also expanding advanced packaging capacity at its facility in Kaohsiung.
Memory manufacturers are also aggressively ramping up their advanced packaging capacity. SK Hynix, which exclusively supplies HBM for NVIDIA AI chips, recently announced plans to invest USD 1 billion in the development of advanced packaging. They view advanced packaging as the “future focus of semiconductor development for the next 50 years.
Advanced Packaging: Over a Decade of Development
In fact, advanced packaging is not a new concept. Tracing the history of packaging technology, the year 2000 undoubtedly marked a turning point. From this year onwards, packaging technology shifted from traditional wire bonding and flip-chip methods to “wafer-level packaging,” where most or all packaging and testing processes are conducted on the wafer itself.
The 2.5D packaging, which gained significant attention after 2023, actually emerged as early as 2010. However, due to cost concerns, the number of manufacturers adopting this technology was relatively limited, with a focus on high-performance computing chips.
Chiang Shang-yi, the Chief Strategy Officer of Foxconn Semiconductor, recalled the initial lack of interest in CoWoS technology, which even led to him being regarded as a “joke” within the company( TSMC) for proposing advanced packaging. He also revealed that the first company willing to adopt the costly CoWoS technology was actually Huawei.
▲ Semiconductor Packaging Technology Evolution compiled by McKinsey, Accelerated Technological Evolution after 2000 (Source: McKinsey)
Compared to 2D packaging technology, 2.5D packaging involves placing an intermediate layer between the chip and the IC substrate and stacking different chips in parallel. TSMC’s CoWoS has become synonymous with 2.5D packaging, where a silicon interposer layer is inserted between the chip and the SiP substrate, and metal layers are connected using Through-Silicon Vias (TSVs) to overcome the density limitations of SiP substrates, which previously restricted the number of chips.
Despite TSMC’s dominance, Intel, with its extensive technical expertise in CPU packaging, cannot be underestimated. In the 2.5D packaging battlefield, Intel employs EMIB technology as its strategy. Unlike CoWoS, EMIB does not utilize a silicon interposer layer.
Instead, its key feature lies in the “Silicon Bridge,” buried within the packaging substrate, which connects the bare dies. Intel believes that EMIB offers cost advantages compared to solutions using large silicon interposer layers.
In recent years, Samsung, which has been actively cultivating the semiconductor foundry market, has also ventured into the 2.5D packaging arena. Their proprietary I-Cube technology has traditionally targeted applications in High-Performance Computing (HPC) chips. When Samsung introduced I-Cube4 in 2021, it emphasized the integration of multiple logic dies and HBM placed on a silicon interposer layer, enabling heterogeneous integration into a single chip.
As Moore’s Law approaches its limits and the massive computational demands triggered by generative AI continue to surge, coupled with the trend towards lighter, thinner, and smaller end products, chips are inevitably evolving towards more transistors, greater computational power, and lower power consumption performance.
Therefore, the transition of packaging technology from 2.5D to 3D is undoubtedly an inevitable development.
The difference between 3D and 2.5D packaging lies in the stacking method. In 2.5D packaging, chips are stacked parallelly on an intermediate layer, while in 3D packaging, chips are stacked vertically in a three-dimensional manner.
The advantage of 3D packaging lies in its ability to create more space for transistors within a chip through stacking, shorten the distance between different bare dies significantly, enhance transmission efficiency, and reduce power consumption during transmission.
TSMC, Intel, and Samsung Racing for 3D Packaging Technology
TSMC’s positioning in 3D IC technology is undeniable. Its SoIC technology adopts the wafer-to-wafer bonding technique. SoIC integrates homogeneous and heterogeneous small dies into a single chip, with smaller dimensions and a thinner profile. It can be integrated into 2.5D CoWoS or InFO. From an external perspective, SoIC resembles a universal SoC chip but integrates various functions heterogeneously.
Intel’s layout in 3D packaging revolves around its 3D Foveros technology. Structurally, the bottom layer comprises a packaging substrate, with a bottom wafer placed on top serving as an intermediate layer. Within this intermediate layer, numerous TSVs (Through-Silicon Vias) are present, facilitating connections between the upper chips, modules, and other parts of the system to achieve transmission purposes.
Samsung’s X-Cube 3D packaging technology utilizes TSV processes. Currently, Samsung’s X-Cube test chips can stack the SRAM layer on top of the logic layer, interconnected via TSVs, employing its 7nm EUV process technology.
TSMC’s Comprehensive Ecosystem Strategy
Currently dominating the advanced packaging market, thanks to its acquisition of large contracts for manufacturing NVIDIA AI chips, TSMC is not only continuing to develop more advanced packaging technologies but is also actively promoting its 3D Fabric platform.
In addition to incorporating the three key packaging technologies CoWoS, InFo, and SoIC, this platform has expanded into an industry alliance. It includes participation from EDA, IP, DCA/VCA, memory, packaging and testing suppliers, as well as substrate and testing vendors. The goal is to create a complete 3D Fabric ecosystem, strengthen innovation, and enhance customer adoption willingness.
This alliance has attracted active participation from heavyweight players in the semiconductor upstream supply chain. Even companies traditionally seen as competitors in the packaging and testing sector, such as Amkor, ASE Technology Holding, and Siliconware Precision Industries (SPIL), are members. The comprehensive supply chain has become a significant advantage for TSMC in providing advanced packaging contract manufacturing services.
▲ TSMC’s 3D Fabric Alliance members, including major players from EDA to packaging and testing companies. (Image Source: TSMC)
In comparison, Intel, despite its robust technological expertise developed over many years and its proposition to independently provide wafer manufacturing or testing services, faces a disadvantage in expanding its market share in advanced packaging due to its lack of experience in the foundry market.
On the other hand, Samsung, compared to TSMC, is constrained by its yield issues in advanced processes. This limitation leads IC design companies to prioritize foundries with more stable yields when considering outsourcing comprehensive manufacturing services.
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(Photo credit: TSMC)
News
Taiwan’s residential and industrial electricity prices have long ranked among the lowest globally, but, as per CNA’s report, to stabilize Taiwan Power Company’s finances, electricity price hikes in April are nearly finalized. Among these adjustments, industrial electricity rates will vary based on the specific industry’s consumption patterns.
Under the current plan, residential and general industrial electricity will be categorized into three tiers, each subject to different price adjustments. As for the “super consumers” in the high-voltage category (defined as those with over 5 billion kilowatt-hours consumed annually for two consecutive years), the rate hike could reach up to 30 percent, impacting major consumers in the semiconductor firms like TSMC and Micron.
As per the report from Taiwanese media NowNews, market concerns are mounting over the 24-hour operations of semiconductor fabs. Despite the potential for energy savings through “time-based electricity pricing,” the effectiveness of such measures may be limited. This could significantly escalate operating costs for companies.
Regarding the potential impact of electricity price adjustments on the semiconductor industry, Taiwanese Minister of Economic Affairs Mei-Hua Wang recently stated that even with 24-hour electricity usage, TSMC maintains high energy efficiency. Moreover, semiconductor fabs primarily export their products after manufacturing. Compared to fabs in other countries, Taiwan’s electricity prices are still relatively low.
The definition of high-voltage super consumers entails annual electricity usage exceeding 5 billion kilowatt-hours, with consecutive growth over two years. Different companies will be distinguished within this category. Semiconductor manufacturers, as well as data centers, will be included in the high-voltage super consumer classification.
However, the rate hike of electricity prices for these significant consumers will depend on the subsidy budget allocated by the Executive Yuan. If a subsidy of TWD 100 billion (roughly USD 3.2 billion) is allocated, the rate hike could exceed 30%. Even with a subsidy of TWD 150 billion (roughly USD 4.8 billion) , the increase would still surpass 20%.
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(Photo credit: TSMC)