On September 9, Indian tech blog PiunikaWeb cited a report from Tech & Leaks Zone, stating that rumors have hinting at Google’s preparation to exit Samsung Electronics’ wafer foundry business, Samsung Foundry, and switch to TSMC in 2025. The next two generations of Google’s custom Tensor processors are reportedly expected to use TSMC’s 3nm and 2nm processes, respectively.

As per the same report, Google’s Tensor G4 processor is being manufactured by Samsung Foundry using its 4nm process. However, the G4 offers only a slight upgrade compared to the Tensor G3 in the Pixel 8 smartphone, as the G4 continues to use Samsung’s older FO-PLP packaging technology instead of the newer FO-WLP packaging, which is more capable in preventing overheating.

On the other hand, Google’s Tensor G5, which will be used in the Pixel 10, is reportedly set to be manufactured by TSMC using the latest 3nm process and TSMC’s advanced InFO-POP packaging technology. The Tensor G6, which will support the Pixel 11 series, will also be produced by TSMC using 2nm process.

Notably, Apple had introduced an AI technical document in June, disclosed that two AI models supporting “Apple Intelligence” were trained in the cloud using Google’s custom-designed Tensor Processing Unit (TPU).

Per Google’s official website, the cost of using its most advanced TPU can be less than USD 2 per hour if reserved three years in advance. Google first introduced the TPU in 2015 for internal use, and it became available to the public in 2017.

Additionally, per a report from wccftech, Google’s ARM-based TPU v5p “Axion,” designed specifically for data centers, is also rumored to be manufactured using TSMC’s enhanced 3nm process, N3E.

Read more

• [News] Google’s Tensor G5 Reportedly Manufactured with TSMC’s 3nm and InFO-POP Packaging
• [News] Breaking Apple’s Monopoly – TSMC’s InFO Packaging Reportedly Adds Google Chips

(Photo credit: Google)

At the Google I/O 2024 developer conference on Tuesday, Google unveiled its 6th generation custom chip, the Trillium TPU, which is scheduled to hit the market later this year, according to the report by TechCrunch.

According to the information provided by Google on its website, compared to TPU v5e, Trillium boasts a 4.7x peak compute performance increase per chip. Google has also doubled the High Bandwidth Memory (HBM) capacity and bandwidth, along with a 1x increase in Interchip Interconnect (ICI) bandwidth between chips.

Additionally, Trillium features the third-generation SparseCore, a dedicated accelerator for processing large embeddings, aimed at handling advanced ranking and recommendation workloads. Moreover, Trillium achieves a 67% higher energy efficiency compared to TPU v5e.

Trillium has the capacity to expand up to 256 TPUs within a singular pod boasting high bandwidth and low latency. Additionally, it incorporates multislice technology, allowing Google to interlink thousands of chips, thus constructing a supercomputer capable of facilitating a data center network capable of processing petabits of data per second.

In addition to Google, major cloud players such as AWS, Meta, and Microsoft have also made their way to develop their own AI Chips.

In late 2023, Microsoft unveiled two custom-designed chips, the Microsoft Azure Maia AI Accelerator, optimized for AI tasks and generative AI, and the Microsoft Azure Cobalt CPU, an Arm-based processor tailored to run general purpose compute workloads on the Microsoft Cloud. The former is reportedly to be manufactured using TSMC’s 5nm process.

In May 2023, Meta also unveiled the Meta Training and Inference Accelerator (MTIA) v1, its first-generation AI inference accelerator designed in-house with Meta’s AI workloads in mind.

AWS has also jumped into the AI chip market. In November, 2023, AWS released Trainium2, a chip for training AI models.

Read more

• [News] Tech Giants Pick up Steam in AI Sector
• [News] Rise of In-House Chips: 5 Tech Giants In the Front

(Photo credit: Google)