According to a report from Commercial Times, despite ongoing turbulence in the semiconductor industry, including Intel’s capital expenditure cuts and reported bottlenecks in NVIDIA’s B-series GPU, TSMC’s leading position in the industry may remain unshaken.

The sources cited in the report note that the issues with the B-series GPU, stemming from mask replacements to enhance chip stability, have been quickly resolved by the foundry.

The sources cited in the report believe that NVIDIA’s Blackwell started production at the end of the second quarter. To improve stability, NVIDIA replaced some masks, causing about a two-week production delay. The redesign has been completed, and large-scale production will proceed in the fourth quarter.

The same source do not believe it will affect TSMC’s CoWoS revenue, as the idle two-week capacity will be filled by the equally strong demand for H100.

On the other hand, Intel’s CPUs are reportedly facing issues as well. As per the company’s statement, the 13th and 14th generation Intel Core desktop systems are experiencing instability due to a microcode algorithm resulting in incorrect voltage requests to the processor.

Although the company has provided a two-year warranty extension and real-time updates to fix the errors, concerns about design flaws and manufacturing process issues still exist.

In 2024, Intel’s new platforms, Arrow Lake and Lunar Lake, will have their CPU tiles produced using TSMC’s 3nm process, accelerating the production schedule. Lunar Lake and Arrow Lake are expected to ship officially by the end of the third and fourth quarters of this year, respectively.

With the support of the 3nm technology, these measures are expected to alleviate market concerns.

The sources cited by Commercial Times estimate that TSMC’s competitor Intel has begun to strictly cut costs, reducing capital expenditures by 20%. This could affect key capabilities in mass production and defect resolution in wafer manufacturing.

Therefore, sources cited by the report believe that TSMC’s leading position remains difficult to challenge in the short term.

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• [News] TSMC Pushes for FOPLP Mass Production by 2027, Reportedly Eyeing on Innolux’s Plant
• [News] TSMC Reportedly Forms a Team on FOPLP Development, with Mini Line on the Road

(Photo credit: TSMC)

Automotive chip market, previously enjoying robust growth among the semiconductor sector, is now showing signs of slowing down.

According to a report from WeChat account DRAMeXchange, the major foundry UMC announced that it expects customer inventories in the communications, consumer electronics, and computer sectors to return to seasonal levels as usual in the second half of this year, and to reach healthy levels by the end of the year.

However, demand in the automotive end market remains weak, which may extend the period of inventory adjustment, with healthy levels anticipated only by the first quarter of next year.

Another foundry giant, TSMC, warned in its latest financial statement that the automotive market might decline this year in spite of a quarter-on-quarter increase of 5% in the revenue of its automotive electronics end market in 2Q24.

Meanwhile, the sluggish growth trend in the automotive chip market is also exemplified by the business performance of three leading automotive chip companies—Texas Instruments, STMicroelectronics, and NXP as they all saw declines in revenues.

Texas Instruments’ revenue for 2Q24 was USD 3.82 billion, down 16% YoY and the sales of its industrial and automotive business continue to decrease.

STMicroelectronics delivered revenue of USD 3.23 billion, down 25.3% YoY, with automotive business revenue falling short of expectation, offsetting growth in personal electronics sales.

NXP’s achieved revenue of USD 3.13 billion, down 5.2% YoY and its automotive business generated revenue of USD 1.728 billion, down 7.4% YoY, indicating the decline widened compared to the first quarter.

Despite the strong growth in the automotive chip market in 2023, the industry believes that as the overall automotive end market fails to advance as expected and there is an overcapacity in some automotive chip markets, automotive chip market growth will slow down in 2024, with the growth rate dropping to single digits in the coming years.

It’s learned that automotive semiconductor can be broadly categorized into microcontroller (MCU), computing chip (CPU, GPU, NPU, etc.), sensing chip (radar, image sensor, photoelectric sensor, etc.), memory chip (DRAM, NAND Flash, etc.), communication chip (CAN bus chip, connectivity chip, etc.), and power chip (IGBT, silicon carbide, etc.), among others.

In the view of the industry, current MCU and other chips are facing significant inventory pressure due to the declining automotive end market demand. However, power chip and autonomous driving chip continue to see strong demand driven by the wave of automotive electrification and intelligence.

Therefore, while the automotive semiconductor market may slow down in the short term, the automotive chip market still possesses growth potential in the long run with the continuous adoption of silicon carbide and autonomous driving chips in the increasingly popular EV and smart vehicle markets.

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(Photo credit: Pixabay)

As the demand for AI GPUs increases, TSMC’s advanced packaging capacity for CoWoS is struggling to keep up. Recently, according to a report from Commercial Times, NVIDIA has reportedly turned to Intel for advanced packaging solutions.

According to industry sources cited by the same report, TSMC’s CoWoS-S and Intel’s Foveros packaging technologies are similar, allowing clients to turn to Intel and secures the capacity needed quickly.

Despite its current struggling on transformation, Intel has been gradually developing its ‘s foundry services. In addition to clients like Qualcomm and Microsoft, Intel’s advanced packaging has also attracted interest from companies like Cisco and AWS.

Under the IDM 2.0 strategy, Intel has opened up its wafer outsourcing and foundry services to customers, establishing an the independent IFS foundry service. Earlier this year, Intel secured a major USD 15 billon foundry order from Microsoft for the first system-level AI foundry service, which is expected to use the Intel 18A process.

The report from Commercial Times further suggested that Microsoft’s move is anticipated to reduce its heavy reliance on TSMC. The report also indicates that chip customers, including NVIDIA, have engaged with Intel. Intel’s flexible foundry strategy, which can provide advanced packaging, software, and chiplet services tailored to customer needs, has been well-received by chipmakers.

Sources cited by the same report reveal that the U.S. has begun allocating specialized funds to increase investments in the advanced packaging sector as well. This move could highlight the importance of advanced packaging as the next key area for global competition in production capacity.

In November last year, the U.S. Department of Commerce’s National Institute of Standards and Technology (NIST) released a report titled “National Advanced Packaging Manufacturing Program,” highlighting that advanced packaging technology is one of the key technologies in semiconductor manufacturing.

Additionally, the U.S. Department of Commerce plans to invest approximately USD 3 billion to advance the National Advanced Packaging Manufacturing Program. Intel, alongside Amkor, is another giant in local advanced packaging in the U.S.

The main focus of advanced packaging is on interconnect density, power efficiency, and scaling. From Foveros to hybrid bonding technology, Intel is gradually scaling down bumping pitch sizes, which allows for higher current loads and better thermal performance.

Furthermore, in May last year, Intel’s advanced packaging technology roadmap outlined plans to transition from traditional substrates to more advanced glass substrates.

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(Photo credit: Intel)

TSMC’s fan-out (InFO) packaging process will no longer be exclusively used by Apple. According to a report from Commercial Times, it’s revealed that Google’s self-developed Tensor chips for their phones will switch to TSMC’s 3nm process next year and will also start using InFO packaging.

TSMC developed InFO packaging based on FOWLP (fan-out wafer-level packaging), which gained prominence after being adopted by the A10 processor in the iPhone 7 in 2016.

TSMC indicated that the current InFO_PoP technology has advanced to its ninth generation. Last year, it successfully certified 3nm chips, achieving higher efficiency and lower power consumption for mobile devices. The InFO_PoP technology, which features a backside redistribution layer (RDL), has entered mass production this year.

According to industry sources cited by the Commercial Times, Google will shift to TSMC for the Tensor G5 chips, which will be used in the Pixel 10 series next year. These chips will not only utilize the 3nm process but will also adopt integrated fan-out packaging.

This year’s Tensor G4 chips, set to be announced soon, use Samsung’s FOPLP (fan-out panel-level packaging). Although wafer-level packaging (WLP) is generally considered to have advantages over panel-level packaging (PLP), FOWLP still prevails at this stage due to yield and cost considerations.

TSMC has also begun developing FOPLP technology. Previously, per sources cited by a report from MoneyDJ, TSMC has officially formed a team, currently in the “Pathfinding” phase, and is planning to establish a mini line with a clear goal of advancing beyond traditional methods.

Although it is not expected to mature within the next three years, major customers like NVIDIA have partnered with foundry companies to develop new materials. One of TSMC’s major clients has already provided specifications for using glass materials.

Traditionally, chip advancements have been achieved through more advanced process nodes. However, new materials could enable the integration of more transistors on a single chip, achieving the same goal of scaling.

For instance, Intel plans to use glass substrates by 2030, potentially allowing a single chip to house one trillion transistors – 50 times the number in Apple’s A17 Pro processor. This suggests that glass substrates could become a significant milestone in chip development.

Another sources cited by Commercial Times have also indicated that glass substrates are part of the medium- to long-term technological roadmap. They can address challenges in large-size, high-density interconnect substrate development.

Currently, this technology is in the early stages of research and development. Its impact on ABF (Ajinomoto Build-up Film) substrates is expected to become significant in the second half of 2027 or later.

Read more

• [News] TSMC Pushes for FOPLP Mass Production by 2027, Reportedly Eyeing on Innolux’s Plant
• [News] TSMC Reportedly Forms a Team on FOPLP Development, with Mini Line on the Road

(Photo credit: TSMC)

A previous report from Economic Daily News once reported that, Innolux is set to sell its 4th Plant in Tainan (5.5-generation LCD panel plant), which was closed in 2023. Moreover, the report has cited rumors in the market, claiming that both Micron and TSMC have been actively exploring the acquisition.

Eariler on August 1st, the latest report from MoneyDJ further suggests that TSMC is almost certain to secure the deal, primarily to expand its CoWoS capacity. Regarding this matter, neither company has commented on these market rumors.

On July 30, Innolux announced its plan to dispose of the TAC plant-related real estate at the Southern Taiwan Science Park (STSP) D section, so as to bolster operational funds. To expedite the process and meet business needs, the board authorized Chairman Jim Hung to negotiate terms and sign relevant contracts with potential buyers.

Reportedly, the sale price must not be lower than the asset’s book value in the most recent financial statements, taking into account professional valuation reports and market information.

The recent trend of FOPLP (Fan-Out Panel Level Packaging) is said to have fueled speculation and discussions about Innolux’s plant sale, leading to rumors that TSMC is on the verge of announcing the purchase.

Yet, per MoneyDJ, TSMC’s current FOPLP applications in the AI field primarily involve stacking on rectangular substrates, integrating them into 2.5D and 3D packages. Initially, TSMC prefers to complete the entire FOPLP process in-house, integrating the front-end and back-end technologies of the 3D fabric platform.

For Innolux, besides gaining considerable non-operating income, this opportunity also raises the prospect of future collaboration.

Notably, this rumored move comes as construction at TSMC’s first P1 plant in the Southern Taiwan Science Park’s Chiayi Campus was halted due to the discovery of potential archaeological remains.

With P1 construction paused, TSMC has prioritized the construction of the second plant (P2). However, current capacity is very tight, and the time required to complete and ramp up P2 to mass production may not meet customer demand. The long-term substantial demand has driven TSMC to seek additional suitable locations in advance.

It is indicated by MoneyDJ that though TSMC’s Chiayi plant is currently facing delays due to the archaeological site issue, Chiayi is still planned to be a major hub for CoWoS production in the long term, with six phases planned. Previously, the company had considered expanding SoIC (System on Integrated Chips) production in Yunlin, but has recently decided to put those plans on hold.

Overall, the latest industry estimates suggest that CoWoS monthly capacity could reach about 35,000 to 40,000 wafers this year. On 2025, if outsourcing to packaging and testing subcontractors is included, capacity could potentially exceed 60,000 wafers, or even more next year.

Read more

• [News] Innolux Confirms Sale of Tainan Plant 4, with Micron & TSMC Reportedly in the Bidding Stage
• [News] TSMC Halts Chia-Yi Plant Construction Due to Relic Found, Quickly Initiates Preparation for 2nd Plant

(Photo credit: Innolux)