According to a report from TechNews, citing a report from Nikkei, TSMC is set to receive ASML’s most advanced High NA EUV lithography machines before the end of the year.

The machine, known as high numerical aperture extreme ultraviolet (High NA EUV) lithography equipment, costs over USD 350 million each and allows semiconductor manufacturers to produce wafers with smaller transistor line widths, according to Nikkei.

The report indicated that TSMC is likely to use the machines for its angstrom 10 (A10)  technology, expected to enter mass production sometime after 2030. The A10 technology is about two generations ahead of the 2-nm chips that TSMC plans to mass produce by the end of 2025.

The report from TechNews noted that acquiring High NA EUV lithography equipment does not guarantee a smooth entry into the “angstrom” (A10) domain. Chip manufacturers must still make design adjustments after acquiring the equipment.

According to the report from Nikkei, TSMC is not the first to acquire ASML’s latest and most advanced equipment—Intel was the first to adopt it. Intel’s Oregon fab received the first set of High NA EUV machines in the first quarter of this year, followed by a second set in the second quarter.

According to another report from TechNews, the CEO of ASML has announced that Intel’s second High-NA EUV system has been completely assembled in October.

On the other hand, according to Sedaily, Samsung is expected to begin bringing in its first High-NA EUV equipment between the end of this year and the first quarter of next year. However, the company is said to reduce the number of next-generation High NA EUV lithography machines it plans to introduce, according to a report from South Korean media outlet BusinessKorea citing sources.

Intel, Samsung, and TSMC are currently the only clients of ASML’s High NA EUV machines. Meanwhile, due to U.S. sanctions preventing Chinese companies from accessing ASML’s EUV products and services, ASML has lost the Chinese market. However, the company stated that it has still received orders for 10 to 20 units, as the report from TechNews indicated.

According to the report from TechNews, as ASML monopolizes the advanced EUV lithography market—essential for manufacturing next-generation semiconductors—the U.S. has started investing in EUV research to revive its domestic semiconductor supply chain. However, this effort may take years, or even decades, to bear fruit.

According to a report from eeNews, recently, the U.S. government is funding a billion-dollar research center focused on next-generation EUV process technology, marking the first CHIPS for America R&D flagship facility. This initiative is designed to advance domestic capabilities in semiconductor technology.

Read more

• [News] Samsung Reportedly Reduces Procurement of ASML’s Next-Generation EUV Lithography Equipment
• [News] Intel Completes Assembly of Second High-NA EUV System, ASML Confirms

(Photo credit: TSMC)

Driven by booming demand for AI chips, TSMC’s advanced CoWoS (Chip on Wafer on Substrate) packaging faces a significant supply shortage. In response, TSMC is expanding its production capacity and is considering price increases to maintain supply chain stability.

According to a recent report from Morgan Stanley cited by Commercial Times, TSMC has received approval from NVIDIA to raise prices next year, with CoWoS packaging expected to increase by 10% to 20%, depending on capacity expansion.

At TSMC’s Q3 earnings call, Chairman C.C. Wei highlighted that customer demand for CoWoS far outstrips supply. Despite TSMC’s plan to more than double CoWoS capacity in 2024 compared to 2023, supply constraints persist.

To meet demand, TSMC is collaborating closely with packaging and testing firms to expand CoWoS capacity. Industry sources quoted by CNA reveal that ASE Group and SPIL are working with TSMC on the back-end CoWoS-S oS (on-Substrate) process. By 2025, ASE may handle 40-50% of TSMC’s outsourced CoWoS-S oS packaging.

ASE announced investments in advanced packaging, covering CoWoS front-end (Chip on Wafer) and oS processes, along with advanced testing.

SPIL, a subsidiary of ASE, recently invested NT$419 million in land at Central Taiwan Science Park’s Erlin Park, boosting CoWoS capacity. Additionally, SPIL has allocated NT$3.702 billion to acquire property from Ming Hwei Energy in Douliu, Yunlin, for further expansion.

ASE also announced in early October that its new Kaohsiung K28 facility, slated for completion in 2026, will expand CoWoS capacity.

In early October, TSMC announced a partnership with Amkor in Arizona to expand InFO and CoWoS packaging capabilities. Industry sources cited by CNA suggest that Apple, a user of TSMC’s U.S.-based 4nm process for application processors, may leverage Amkor’s CoWoS capacity. Other U.S.-based AI clients utilizing TSMC’s advanced nodes for ASICs and GPUs are also expected to consider Amkor’s CoWoS packaging in the future.

(Photo credit: TSMC)

Ahead of the upcoming presidential election and shortly after the TSMC-Huawei investigation, U.S.-based GlobalFoundries, the world’s third largest foundry company, was fined by the U.S. government for USD 500,000 for unauthorized shipments of chips to SJ Semiconductor, an affiliate of blacklisted Chinese chipmaker SMIC, according to a report by Reuters.

According to a press release by the Bureau of Industry and Security (BIS), GlobalFoundries made 74 shipments, valued at USD17.1 million, to SJ Semiconductor, an SMIC affiliate, without obtaining the required license. “We want U.S. companies to be hypervigilant when sending semiconductor materials to Chinese parties,” said Assistant Secretary for Export Enforcement Matthew S. Axelrod in the press release.

The report by Reuters notes that both SMIC and SJ Semiconductor were placed on the Entity List, which is a trade restriction list, in 2020 due to SMIC’s alleged ties to China’s military-industrial complex. SMIC has denied any wrongdoing, according to Reuters.

According to BIS’ explanation, GlobalFoundries understood that shipments of items subject to the Export Administration Regulations (EAR) to SJS required a BIS license. Although SJS was not a direct customer of GlobalFoundries, it was the designated third-party outsource assembly and test service provider (OSAT) for one of GlobalFoundries’ customers, which meant it should have been screened by GlobalFoundries’ transaction screening system.

Citing a statement by GlobalFoundries, the report by Reuters states that the foundry giant expressed regret for “the inadvertent action, which was the result of a data-entry error made prior to the entity listing,” leading to the unintentional shipment of legacy chips without a license.

It is worth noting that Washington seems to be gradually enhancing its regulatory strength on preventing China from accessing leading-edge semiconductors recently. Just a weeks ago, foundry leader TSMC has been amidst the storm when its chips were found on Huawei’s Ascend910B. The Taiwan-headquartered foundry giant reportedly notified the U.S. afterwards about chips fabricated for a potential Huawei proxy, Sophgo, as well as halting the supply.

According to Reuters, this development also coincides with GlobalFoundries set to receive approximately USD 1.5 billion from the Commerce Department to establish a new semiconductor manufacturing facility in Malta, New York, and to expand its existing operations in Burlington, Vermont.

Read more

• [News] GlobalFoundries Reportedly Becomes Third Recipient of CHIPS Act Subsidy, Receives USD 1.5 Billion
• [News] Foundry Giant GlobalFoundries Acquired GaN-Related IP

(Photo credit: GlobalFoundries)

Samsung Electronics released its third-quarter earnings on October 31, reporting a sharper-than-expected profit despite a substantial decline in profits from its flagship semiconductor business. Notably, Samsung’s senior management emphasized its continued focus on high-end chip production and disclosed progress in major supply deals. This includes a potential NVIDIA certification for its HBM3E which could boost performance in the fourth quarter.

According to reports from Commercial Times, Samsung Executive Vice President Jaejune Kim addressed analysts about high-end memory chips used in AI chipsets, stating that while they previously mentioned a delay in HBM3E’s commercialization, they have made meaningful progress in product certification with key clients. As a result, they expect HBM3E sales to improve in the fourth quarter and plan to expand sales to multiple customers.

Though Samsung did not disclose client names, analysts believe this certification likely refers to NVIDIA, which commands 80% of the global AI chip market.

According to Economic Daily News, Samsung reported significant revenue growth in high-bandwidth memory (HBM), DDR5, and server storage products, with expectations for improved performance in its semiconductor business this quarter.

Although demand for mobile and PC memory chips may decline, the growth in AI is expected to sustain robust demand. Demand for AI and data center products, including memory for both AI and traditional servers, is projected to remain strong and stable through next year.

Additionally, Kim tated that the company would flexibly reduce production of traditional DRAM and NAND chips to align with market demand and expedite the shift to advanced process nodes.

The same report from Economic Daily News indicated that Samsung plans to develop and mass-produce HBM4 in the second half of this year. Next year, its memory division will focus on HBM and server SSDs, and there are hints of potential collaboration with TSMC to meet the diverse needs of HBM clients.

(Photo credit: Samsung)

Ahead of Intel’s upcoming Q3 financial announcement on October 31st, the market has speculated that it may suffer another quarter of revenue decline, while the company might reportedly incur a loss over USD 3 billion this year.

However, the struggling giant might have made a significant misstep as early as three years ago, when Pat Gelsinger took over as Intel’s CEO, and soon damaged the relationship with TSMC by offending the foundry leader, according to an in-depth report by Reuters.

Sweet Deal Canceled upon Bold Remarks

According to the report, Intel used to enjoy a favorable arrangement with TSMC, as the latter was producing chips that Intel could not manufacture in-house. Citing several people familiar with the deal, TSMC was offering Intel substantial discounts.

However, rather than carefully fostering the relationship, Gelsinger made controversial statements, one after another, and strained ties with TSMC by highlighting Taiwan’s delicate situation with China, the report notes.

According to Reuters, TSMC decided to revoke Intel’s discount as a counterattack. Citing sources familiar with the situation, instead of offering approximately 40% off on the $23,000, 3nm wafers used to manufacture Intel’s chips, TSMC now asked Intel to pay the full price. The move significantly shrink Intel’s margins.

To recap, Reuters states that in May 2021, just months after Gelsinger took the throne of Intel’s CEO, he highlighted the ongoing US-China conflict and warned that the industry shouldn’t become too reliant on TSMC. “You don’t want all of your eggs in the basket of a Taiwan fab,” he said, implying that companies need to look for other supplier alternatives.

TSMC certainly does not like the comments. According to a previous report by Wccftech, TSMC founder Morris Chang responded by saying that he was taken aback by Gelsinger’s rudeness towards TSMC when they met back in 2015.

Later that December, Gelsinger further advocated for U.S. investment in domestic chipmakers, stating at a tech conference that Taiwan is not a stable place, according to Reuters.

When asked by Reuters about this previously undisclosed incident, Intel stated that TSMC remains an important partner and that they maintain a “healthy business relationship today.” TSMC also told Reuters that Intel is a valued customer.

Still Lagging behind as 18A Challenges Remain

TSMC founder Morris Chang used to say that Gelsinger’s previous remarks were made from an emotional standpoint, which failed to clarify how Intel intends to surpass TSMC technologically in the years ahead. Now, Intel’s push to reclaim its manufacturing edge through a new chip-production process, known as 18A, has encountered delays and technical hurdles, with some potential clients hesitating to adopt it.

According a previous report by Reuters, Broadcom’s initial tests with Intel’s 18A (1.8nm-class) process did not meet expectations, creating additional pressure on the semiconductor giant’s efforts to catch up with TSMC in the foundry sector.

The report noted that Broadcom tested Intel’s 18A by producing wafers with typical design patterns. However, its engineers and executives were said to be disappointed with the results, regarding the process as “not ready for high-volume production.”

Read more

• [News] Former Intel Directors Urges the Company to Spin off its Fab Business
• [News] Intel Reportedly Aims to Raise Billions through Sale of Minority Stake in Altera

(Photo credit: Intel)