Recently, TSMC reportedly got approval for the land change and environmental assessment of its third 2nm plant in Kaohsiung.

It is reported that the Nanzih Industrial Park in Kaohsiung City will adapt to the changing needs of the global semiconductor industry supply chain and will carry out the development of the park in stages. TSMC obtained the construction permit for the first phase of its 2nm advanced process plant in the Nanzih Industrial Park in September 2022, kick starting the construction of first phase, with mass production expected in 2025. The second phase of the plant is also underway.

In response to the shift in the supply chain and the market demand of the global semiconductor industry, TSMC has an urgent need to expand production. The Urban Development Bureau of Kaohsiung City Government stated that TSMC chose to initiate the urban plan variation procedure for the third phase of the plant on the east side of the first phase of the park, covering an area of 17.22 hectares.

To ensure that the industrial use category matches the land use content, the special industrial zone will be changed to a Type A industrial zone, and the building coverage ratio will be adjusted to 45% in consideration of the need of construction, while the original floor area ratio of the special industrial zone will remain at 160%.

Regarding the third 2nm plant, the Kaohsiung City Government’s Water Conservancy Bureau issued a statement saying that the city government fully supports TSMC’s establishment of the plant in the Nanzih Industrial Park, and the reclaimed water supply will be fully guaranteed.

As for electricity, the Economic Development Bureau explained that Kaohsiung’s total power generation in 2022 was 50.886 billion kWh, with total electricity sales of 30.734 billion kWh, accounting for only 60% of power generation. In the future, all TSMC plants will adopt a dual-circuit system to ensure stable power supply.

Previously, Tai-Hsiang Liao, Director of the Economic Development Bureau, pointed out in early April that the city government will provide relevant assistance to meet TSMC’s water and electricity supply needs in Kaohsiung. Additionally, Liao further stated that, based on the current land assessment in the park, the maximum scale of TSMC’s Kaohsiung plant could be up to five plants.

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(Photo credit: TSMC)

TSMC’s advanced 2-nanometer process capacity is set to begin mass production in 2025, with equipment manufacturers actively delivering machines. According to a report from Commercial Times, the EUV (Extreme Ultraviolet Lithography) machines, crucial for advanced processes, will see over 60 units delivered this year and next, with a total investment exceeding TWD 400 billion (roughly USD 12.3 billion).

As production capacity continues to expand, ASML’s delivery volume in 2025 is expected to grow by more than 30%, benefiting the Taiwanese supply chain. Among them, Gudeng Precision is actively collaborating with ASML on next-generation High-NA EUV development, while other Taiwanese fab tool makers, such as Marketech International and YEEDEX, are also expected to benefit.

As per the same report citing sources, it’s revealed that EUV machine supply is tight, with lead times of 16 to 20 months. Therefore, most orders placed in 2024 will be delivered starting the following year. According to the projections cited by the report, TSMC has ordered 30 EUV machines this year and 35 next year, though these numbers may be slightly adjusted due to capital expenditure plans.

In response to customer demand, ASML planned new capacity last year, with a clear growth trajectory for deliveries next year. Reportedly, the total delivery count for this year is estimated at 53 units, with next year’s count expected to exceed 72 units. Previously, according to a report from Reuters on June 5th, ASML already predicted that TSMC was expected to receive ASML’s latest High-NA EUV lithography equipment sometime this year.

The sources cited by Commercial Times further indicate that ASML’s capacity planning for 2025 remains unchanged, targeting 90 EUV units, 600 DUV units, and 20 High-NA EUV units. On November 14, ASML will hold its 2024 Investor Day, where it will present the latest five-year roadmap.

TSMC’s advanced process capacity is gradually ramping up. For the Tainan 3nm plant, mass production will begin in the third quarter, and EUV machines will be introduced progressively at the P8 plant next year. The Hsinchu Baoshan 2nm plant will see strong EUV equipment demand over the next three years, and the Kaohsiung 2nm plant is also advancing simultaneously.

The increasing number of EUV machines is simultaneously driving the growth in the usage of EUV mask boxes. Reportedly, it’s believed that Gudeng Precision will be among the most benefited companies. Gudeng continues to capture market share for FOUP (Front Opening Unified Pod) by maintaining a clean environment that removes plastic or contaminant particles and delivers ready-to-use products directly to customer sites. Additionally, Gudeng is also involved in collaborative development for ASML’s High-NA EUV.

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(Photo credit: ASML)

According to a report from Japanese news outlet Kyodo News, TSMC’s Fab in Kikuyo, Kumamoto Prefecture, Japan (Kumamoto Fab 1) is expected to start mass production in Q4 this year. The planned second Fab (Kumamoto Fab 2) will also be located in Kikuyo. Reportedly, TSMC’s Kumamoto Fab 2 has already begun land preparation, the construction of the fab is set to commence as scheduled in the second half of the year, with the goal of commencing operations by 2027.

The report indicates that Kumamoto Fab 2 is situated to the east of Kumamoto Fab 1, which held its opening ceremony in February. Per Japan’s Ministry of Economy, Trade, and Industry, the land area for Kumamoto Fab 2 is approximately 321,000 square meters, about 1.5 times larger than Kumamoto Fab 1 (an increase of around 50%). The investment for this project is estimated at around JPY 2.2 trillion yen, with the Japanese government providing subsidies of up to JPY 732 billion.

Kumamoto Fab 1 is expected to begin mass production in Q4 of this year, utilizing 28/22nm and 16/12nm process technologies with a monthly capacity of 55,000 wafers.

On February 6th, TSMC announced the construction of Kumamoto Fab 2 in Kumamoto Prefecture. Combined, the total investment for both Fabs is expected to exceed USD 20 billion. Construction of Kumamoto Fab 2 is scheduled to start at the end of 2024, with the goal of beginning operations by the end of 2027, focusing on 6/7nm technology. The combined monthly capacity of Kumamoto Fab 1 and Fab 2 is estimated to exceed 100,000 wafers.

Kumamoto’s newly appointed governor, Takashi Kimura, who took office in April, stated in an report from Bloomberg on May 11th that he would spare no effort to persuade TSMC to establish a third fab in the region. Kimura believed that during the preparations for TSMC’s first fab in Kumamoto, the region already possesses better-quality road and water infrastructure and an education system that better supports international school students, which could be advantageous.

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(Photo credit: TSMC)

TSMC’s advanced CoWoS packaging capacity is in severe shortage, and just as the new plant in the Chiayi Park of Southern Taiwan Science Park began construction for expansion, according to a report from Economic Daily News citing sources, it has stated that TSMC intends to build another advanced packaging plant in Pingtung, which is located in southern Taiwan, and is currently in the site selection phase.

Regarding these rumors, TSMC has not yet responded. The relevant authorities, the Taiwanese National Science and Technology Council, stated that they have not heard of this and emphasized that any information about new plant constructions should be released by the company itself.

Currently, TSMC’s in-house packaging and testing capacities are located in Longtan, Hsinchu Science Park, Zhunan, Central Taiwan Science Park, and Southern Taiwan Science Park, with a new plant under construction in the Chiayi Park of Southern Taiwan Science Park. However, construction of one plant in the Chiayi Park was recently suspended due to the possible discovery of a historical site, prompting TSMC to initiate the construction of a second plant in the area.

If the advanced packaging plant in Pingtung is established, TSMC will have seven advanced packaging and testing sites in Taiwan, spanning across Taoyuan, Hsinchu, Miaoli, Taichung, Chiayi, Tainan, and Pingtung.

TSMC Chairman C.C.Wei previously mentioned that the demand for CoWoS capacity exceeds supply. Despite continuous expansion, TSMC still cannot meet all customer needs. Consequently, TSMC has increased outsourcing to professional packaging and testing subcontractors. TSMC is striving to expand its advanced CoWoS packaging capacity, with a target to more than double its in-house capacity this year and continue efforts next year to narrow the gap between supply and demand.

Industry sources cited in Commercial Time’s previous report have further indicated that by the end of next year, TSMC’s monthly CoWoS capacity will be increased to 60,000 wafers. With growing orders and a steep learning curve, the annual capacity is expected to surpass 600,000 wafers next year. As the semiconductor industry advances into the Angstrom Era, the gap in TSMC’s advanced packaging capacity will gradually widen.

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(Photo credit: TSMC)

TSMC is said to be entering the fan-out panel-level packaging (FO-PLP) sector, according to a previous report from Nikkei. Now, a report from Business Korea noted that Samsung is making significant strides in the PLP field, as the tech giant acquired the PLP business from Samsung Electro-Mechanics as early as in 2019.

It is interesting to note that TSMC has returned to the development of PLP now, while this technology is actually regarded by Samsung as the “secret weapon” to challenge TSMC’s InFO-WLP technology a few years ago.

In 2015, TSMC has secured all of Apple’s A10 orders by offering the InFO-WLP (Integrated Fan-Out Wafer Level Packaging) technology. According to a previous report by Korea media outlet ETNews, Samsung was prompted to take action, making the company to cooperate with Samsung Electro-Mechanics to start developing FO-PLP technology.

In 2019, Samsung acquired the PLP business from Samsung Electro-Mechanics for 785 billion won (approximately USD 581 million), a strategic move that has paved the way for its current advancements, according to Business Korea.

At the shareholders’ meeting in March this year, Kyung Kye-hyun, the former head of Samsung Electronics’ semiconductor (DS) division, highlighted the importance of PLP technology to the industry, Business Korea noted. Kyung stated that AI semiconductor dies, which are typically 600mm x 600mm or 800mm x 800mm in size, require technologies like PLP, while Samsung is actively developing this technology and collaborating with clients.

Samsung currently offers advanced packaging services such as I-Cube 2.5D packaging, X-Cube 3D IC packaging, and 2D FOPKG packaging. For applications requiring low-power memory integration, such as mobile phones or wearable devices, Samsung already provides platforms like fan-out panel-level packaging and fan-out wafer-level packaging.

On the other hand, TSMC is reportedly collaborating with equipment and material suppliers to develop the panel-level packaging technology, though the research is still in its early stages. By using a rectangular substrate for packaging, replacing the current traditional circular wafer, more chipsets can be accommodated on a single wafer.

The report by Nikkei mentioned that TSMC is currently experimenting with rectangular substrates measuring 515 mm in length and 510 mm in width, providing more than three times the usable area of a 12-inch wafer.

For now, TSMC’s CoWoS advanced chip packaging can combine two sets of NVIDIA Blackwell GPU chips and eight sets of high-bandwidth memory (HBM). As single chips need to accommodate more transistors and integrate more memory, the mainstream 12-inch wafer might not be sufficient for packaging advanced chips soon. The reason behind TSMC’s foray into PLP research, therefore, may be interpreted as a response to the booming AI demand.

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• [News] TSMC Reportedly Develops Panel-Level Packaging, Another New Chip Packaging Tech
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(Photo credit: Samsung)