With high demand for AI chips from major players like NVIDIA and AMD, the capacity for advanced packaging falls short of meeting demand. Industry sources cited in a report from the Economic Daily News indicate that TSMC’s new CoWoS facility in the Southern Taiwan Science Park in Chiayi is now undergoing environmental impact assessments, prompting the commencement of equipment procurement.

Additionally, considering the insufficiency of planned CoWoS facilities in the Chiayi park, TSMC is reportedly sending representatives to survey additional land for potential expansion.

Regarding these developments, TSMC stated on June 11 that they do not comment on market rumors.

With the rapid development of AI applications, the demand for advanced packaging in the chip market has surged. TSMC, serving as the major foundry partner for tech giants like NVIDIA and AMD in AI chip production, has faced continuous high demand for advanced packaging capacity for some time. The company has been actively expanding related capacity and is now venturing into building a new CoWoS facility in the Southern Taiwan Science Park in Chiayi.

According to the information previously announced by the Chiayi County government, TSMC’s advanced packaging facility will occupy approximately 20 hectares in the Southern Taiwan Science Park, with the first facility covering around 12 hectares. The first advanced packaging fab is expected to be completed by the end of 2026, creating 3,000 job opportunities. TSMC initially plans to build two advanced packaging facilities in the area.

According to official information from TSMC, its backend test and packaging facilities include the Hsinchu Advanced Backend Fab 1, Southern Taiwan Science Park Advanced Backend Fab 2, Longtan Advanced Backend Fab 3, Central Taiwan Science Park Backend Advanced Fab 5, and Miaoli Zhunan Advanced Backend Fab 6.

Industry sources cited by the same report from the Economic Daily News further indicate that advanced packaging-related equipment is currently being gradually supplied to TSMC’s Zhunan, Central Taiwan, and Southern Taiwan fabs, with shipments to the Chiayi facility expected to commence from the third quarter of next year.

TSMC Chairman C.C. Wei previously mentioned that despite their efforts to increase capacity, the strong demand from customers has led to an insufficient supply, which has led to outsourcing to specialized packaging and testing foundries. He emphasized TSMC’s ongoing expansion of CoWoS advanced packaging capacity, with the goal of doubling their in-house capacity growth this year and continuing efforts into next year to narrow the gap between supply and demand.

TSMC has integrated its advanced packaging-related technologies into the “3DFabric” platform, allowing customers to select and configure according to their needs. The front-end technologies include System on Integrated Chip (SoIC), while the back-end assembly and testing technologies include Integrated Fan-Out (InFO) and the CoWoS series family.

In June 2023, TSMC announced the official opening of its Advanced Backend Fab 6 located in the Zhunan Science Park, becoming its first fully automated advanced packaging and testing facility to realize integrated front-end to back-end processes and testing services under the 3DFabric platform.

Source: TSMC

Read more

• [News] Major Clients Reportedly Fully Allocate TSMC’s Production Capacity Until 2026, 3nm Process in High Demand
• [News] NVIDIA CEO Jensen Huang Supports C.C. Wei’s Theory and Backs for TSMC to Increase Price

(Photo credit: TSMC)

Starting from October, 2022, the U.S. has launched a series of export controls, targeting to limit China’s access to advanced semiconductor technologies, while tech giants including Intel, Qualcomm and NVIDIA are not allowed to ship some of their most cutting-edge chips to China. Now a new development seems to emerge, as the White House is said to consider additional restrictions on China’s access to gate-all-around (GAA) transistor technology as well as high-bandwidth memory (HBM), according to reports from Bloomberg and Tom’s hardware.

For now, the Big Three in the semiconductor industry have all announced their roadmaps regarding GAA. TSMC plans to adopt GAAFET (gate-all-around field-effect transistor) in its A16 process (2 nm), targeting for mass production in 2026. Intel aims to implement GAA in its upcoming 20A node, which may enter mass production by 2024. Samsung, on the other hand, is the only company to adopt GAA as early as in its 3nm node.

GAA transistors are crucial for pushing Moore’s Law further. By replacing the vertical fin used in FinFET transistors with a stack of horizontal sheets, the structure could further reduce leakage while increase drive current, which enables better chip performance.

Citing sources familiar with the matter, Bloomberg noted that in March, UK has imposed controls on GAAFET structures, which are typically used for chips manufactured with advanced nodes, and now the U.S. and other allies are expected to follow. The related restrictions are reportedly expected to be implemented as soon as this summer, according to the report, though further details have yet to be confirmed.

Also, it remains unclear whether the ban would restrict China’s ability to develop its own GAA chips or prevent U.S. and other international chipmakers from selling their products to Chinese firms, the report noted.

In addition to GAA, the Bloomberg report also mentioned that there have been preliminary discussions about restricting exports of high-bandwidth memory (HBM) chips. HBM chips, produced by memory giants like SK Hynix, Samsung and Micron, could enhance the performance of AI applications and are utilized by companies such as NVIDIA.

Recently, Huawei successfully mass-produced 7nm chips without using lithography technology. This development has surprised the global semiconductor market and has led to speculation that Huawei may soon also mass-produce 5nm chips. However, Zhang Ping’an, the Chief Executive Officer of Huawei Cloud Services, expressed concern earlier that China, due to US sanctions, is unable to purchase 3.5nm chip equipment.

Read more

• [News] Huawei Reportedly Acknowledges China’s Semiconductor Development May Have Plateaued, Facing Challenges Below 3.5nm
• U.S. Updates Advanced Semiconductor Ban, Actual Impact on the Industry Will Be Insignificant, Says TrendForce

(Photo credit: Intel)

The continuous increase in silicon content driven by AI servers, high-performance computing (HPC) applications, and the AI integration of high-end smartphones has led to a surge in demand for semiconductors. According to a report from the Economic Daily News, major companies such as Apple, Qualcomm, NVIDIA, and AMD are reportedly securing substantial production capacity for TSMC’s 3nm process family. This has resulted in a queue of clients stretching all the way to 2026.

TSMC has a consistent policy of not commenting on individual client information. Regarding whether the high demand for production capacity will lead to price increases to reflect its value, TSMC emphasizes that its pricing strategy is always strategically oriented rather than opportunistically driven. TSMC will continue to work closely with clients to provide value.

As per sources cited by the same report, TSMC is not a company that raises prices arbitrarily. Reflecting value does not equate directly to price increases, even though the company holds a leading edge in advanced process technology. There are various ways for TSMC to demonstrate value to its customers.

The members of TSMC’s 3nm family include N3, N3E, N3P, as well as N3X and N3A. As the existing N3 technology continues to be upgraded, N3E, which began mass production in the fourth quarter of last year, targets applications such as AI accelerators, high-end smartphones, and data centers. N3P is scheduled for mass production in the second half of this year and is expected to become mainstream for applications in mobile devices, consumer products, base stations, and networking through 2026. N3X and N3A are customized for high-performance computing and automotive clients.

Source: TSMC

Industry sources cited by Economic Daily News in the report believe that with clients rushing to book production capacity, TSMC’s 3nm family will continue to experience tight supply over the next two years. This does not yet include Intel’s outsourcing demand for CPUs.

Due to the fact that TSMC’s 3nm family production capacity has already been fully allocated by customers for this year and next, the company’s plan to triple the relevant capacity this year compared to last year is still insufficient. To ensure an uninterrupted supply for the next two years, TSMC has implemented several measures to expand its production capacity.

Previously, during an earnings call, the company announced that due to robust demand, its strategy includes converting some 5nm equipment to support 3nm production. Industry sources cited by the report also reveal that TSMC’s total 3nm family capacity is continuously increasing, with monthly production capacity expected to reach between 120,000 and 180,000 wafers.

Meanwhile, the sources cited by the Economic Daily News indicate that the main sources of orders for TSMC’s 3nm family include major clients such as Apple, Qualcomm, NVIDIA, and AMD. Apple is expected to launch the iPhone 16 series as early as September, which is anticipated to be the first iPhone with AI capabilities, potentially sparking a new wave of upgrades among Apple fans.

Source: TSMC

Read more

• [News] NVIDIA CEO Jensen Huang Supports C.C. Wei’s Theory and Backs for TSMC to Increase Price
• [News] TSMC Says Tripling 3nm Capacity This Year Still Not Enough

(Photo credit: TSMC)

Due to the impact of international situations and uncontrollable factors, the global semiconductor supply chain is undergoing a shift. According to a report from WeChat account DRAMeXchange, the Southeast Asian region, with its advantages in labor and development conditions, has become the preferred location for major global companies. Countries such as Malaysia, India, and Singapore have been targeted by many manufacturers, who are rapidly setting up operations to secure a foothold.

On June 5, Taiwan-based contract chipmaker Vanguard International Semiconductor Corp. (VIS) announced to team up with Netherlands-based semiconductor supplier NXP Semiconductors N.V. to set up a joint venture, VisionPower Semiconductor Manufacturing Company (VSMC), and build a 12-inch fab in Singapore.

The fab will have an investment of approximately USD 7.8 billion. VIS will invest USD 2.4 billion and take a 60% stake, with NXP to invest USD 1.6 billion and a 40% share. The fab will be operated by VIS.

Besides, both parties have promised to allocate a total of USD 1.9 billion of long-term capacity security deposit and usage fees, with the remaining funds (Loans included) to be provided by third parties.

VSMC will run as an independent wafer manufacturing service provider, offering a certain proportion of its capacity to both partners. By 2029, the fab’s monthly 12-inch wafer capacity is expected to reach 55,000 pieces, which is projected to create around 1,500 jobs in Singapore. Following the successful mass production of the first fab, both sides will consider building a second one.

This fab will use 130nm to 40nm technologies to produce mixed-signal, power management, and analog products for markets including automotive, industrial, consumer electronics, and mobile terminals. Relevant technology licensing and transfers are expected to come from TSMC. VSMC will commence construction of the first fab in 2H24 , pending approval from relevant regulatory authorities, and it is expected to start mass production in 2027.

Currently, VIS has five 8-inch fabs, respectively located in Taiwan and Singapore. Three of them are based in Hsinchu (Taiwan) and one in Taoyuan (Taiwan). In 2023, the average monthly capacity was about 279,000 8-inch wafers.

On this collaboration with NXP, VIS Chairman Fang Leuh stated that both parties wish to own a 12-inch fab as they currently only have 8-inch fabs. More than half of the new fab’s capacity has already reserved upon long-term commitments from customers, including NXP. He also noted that setting up a fab in Singapore offers several advantages.

Since VIS is held by TSMC, industry experts believe that the establishment of the new VIS fab is driven in part by the need to meet the demands of TSMC’s mature process customers. Mature processes above 90nm account for a small single-digit percentage of TSMC’s revenue but retaining all customers is also necessary to match orders from various manufacturing capacities.

As such, VIS will take over TSMC’s customer orders. Influenced by multiple factors, the order transfer effect is expanding, and VIS has recently received new orders from several customers, like Qualcomm and MPS. That means order transfer effect in 2H24 has become evident.

It is worth noting that Singapore is being seen as a critical hub of the Asian semiconductor industry. It currently boasts a complete semiconductor industry chain, covering design, manufacturing, packaging, test, equipment, materials, and distribution, with more than 300 semiconductor-related companies already established.

According to another report from WeChat account DRAMeXchange, multitudes of semiconductor companies, including Texas Instruments, STMicroelectronics, Infineon, Micron, GlobalFoundries, TSMC, UMC, VIS, and ASE, have set up branches or expanded production in Singapore.

Read more

• [News] TSMC Affiliate VIS and NXP to Invest USD 7.8 Billion for 12-Inch Fab in Singapore, Expected Mass Production by 2027
• Taiwanese Chipmakers Expand Overseas to Capitalize on Geopolitical Shifts and De-Sinicization Benefits, Says TrendForce

(Photo credit: VIS)

Samsung has been strengthening its alliance regarding the semiconductor packaging technology, attempting to narrow the technological gap with TSMC, according to the latest report by Business Korea.

Citing industry sources, Business Korea noted that Samsung is expected to expand its 2.5D and 3D MDI (Multi Die Integration) Alliance to include 30 partners this year, an increase of 10 within just one year.

The MDI Alliance, launched by Samsung Electronics in June, 2023, was established to address the rapid growth in the chiplet market for mobile and HPC applications, in which Samsung will collaborate with its partner companies as well as major players in memory, substrate packaging and testing.

According to Samsung’s press release, the MDI Alliance leads innovation in stacking technology by forming a packaging technology ecosystem for 2.5D and 3D Heterogeneous Integration. Together with partners across the ecosystem, Samsung will provide a one-stop turnkey service to better support customers’ technological innovation.

As demands from AI and data centers have been heated up, stacking and combining different chips are viewed as more cost-effective and efficient than further reducing the circuit size within a chip, which makes 2.5D and 3D IC packaging technology coveted by tech giants like NVIDIA and AMD.

Business Korea further stated that while Samsung does benefit from offering a ‘one-stop’ solution that integrates foundry, HBM, and packaging, successful collaboration is crucial to address the various software challenges that arise from chip integration. That is to say, to overcome this challenge, Samsung has formed a coalition with design firms, post-processing companies, and EDA (Electronic Design Automation) tool providers.

On the other hand, TSMC, the current market leader in 2.5D IC and 3D IC packaging, announced the new 3Dblox 2.0 open standard and its major achievements of its Open Innovation Platform (OIP) 3DFabric Alliance in September, 2023, while AMD confirmed its collaboration with TSMC on 3D IC packaging for the GPU giant’s MI300 AI accelerators, according to a press release by TSMC.

Read more

• [News] Differences Between 3D-SIP and 3D-SIC: Why Are TSMC, Intel, and Samsung All Actively Involved?

(Photo credit: Samsung)