Google has reportedly collaborated with TSMC on the upcoming Tensor G5 chip, slated for use in the Pixel 10 series smartphone to be released next year, according to media outlet Android Authority, based on information it spotted in trade databases.

Google has been cooperating with Samsung on its self-developed Tensor processors since 2021, including the Tensor G4 used in the Pixel 9.

The US tech giant’s latest strategic move is reportedly making Tensor G5 the first Google smartphone chip not produced by Samsung.

According to industry insiders cited by the aforementioned report, despite Google’s relatively low smartphone market share, the act would signify TSMC’s leading position in advanced nodes, and is expected to foster closer collaboration between the two companies in the future.

According to the market share data released by Trendforce in March, in 4Q 2023, Apple ranked as 1^st in global smartphone production, with a 23.3% market share, while Samsung (15.9%) and Xiaomi (12.8%) ranked as 2^nd and 3^rd, respectively. Google, on the other hand, has not made it to the top six.

Regarding other major smartphone players’ product roadmaps next year, in addition to Google’s Pixel 10, Apple is also rumored to cooperate with TSMC on the A19 Pro chip in the iPhone 17 Pro and iPhone 17 Pro Max, based on a previous report from Wccftech.

Samsung, on the other hand, is reportedly planning to use its 2nm process on the latest Exynos 2600 chip, which is expected to start mass production in 2025, and be used in the Galaxy S26 series smartphone, according to a previous report by the Korea media outlet ET News.

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• [News] Samsung Reportedly to Challenge Apple/TSMC with 3nm Exynos W1000

(Photo credit: Google)

This May, we have witnessed two different approaches to the new High-NA EUV (high-numerical aperture extreme ultraviolet) lithography equipment between semiconductor giants. Intel has secured the first batch of High-NA EUV kits from ASML, which will allegedly be used on its 18A (1.8nm) and 14A (1.4nm) nodes. On the other hand, TSMC stated that the company will not utilize this new lithography technology in its upcoming A16 (1.6nm) process.

High-NA EUV machines may be critical for companies aiming to produce chips beyond 2nm, but are they must-have?

Looking back in history, the industry used to believe that when the U.S. prevented EUV exports to China, the act would limit China’s progress in 7nm. However, China’s largest foundry, SMIC, is rumored to produce 5-nm chips for Huawei this year, without the need for EUV lithography machines.

When examining TSMC’s trajectory on EUV itself, it is worth mentioning that the company took a more cautious stance, as well. When Samsung began using EUV in its 7nm process in 2018, TSMC successfully launched its first 7nm production line using mature DUV lithography.

It was not until the stability and maturity of EUV had been confirmed that TSMC started to use EUV in its N7+ process, which took place in 2019. In the end, in spite of Samsung’s early adoption of EUV, yield issues allowed TSMC to overtake them.

Similarly, in the race for the 3nm process, unlike Samsung, instead of rushing to adopt GAAFET, TSMC chose the reliable FinFET route.

Will history repeat itself? Now it would be a good timing to examine TSMC’s strategy on High-NA EUV machines.

High-NA EUV technology: A Cure for All?

According to a report by China’s Jiwei, at the recent 2024 North America Technology Symposium hosted by TSMC, the company revealed that its A16 process would not require the next-generation High-NA EUV lithography machines, with mass production expected in 2026.

An expert cited by Jiwei stated that TSMC’s decision might be due to the higher risk associated with High-NA lithography machines.

The report noted that there would be still quite a few challenges to be resolved, such as supporting light sources for photon shot noise and productivity requirements, solutions for the 0.55 NA’s small depth of focus, computational lithography capabilities, mask manufacturing, and computing infrastructure including new materials. Not to mention there is the necessary debugging and development time to ensure stability, which implies considerable time and hidden costs.

On the other hand, TSMC began to adopt EUV in its N7+ process in 2019, implying the world’s largest chipmaker has committed plenty of time and effort to refine the technology.

According to the report by Jiwei, by optimizing the EUV exposure dose and the photoresist used, as well as improving photomask life, increasing yield, and reducing defect rates, TSMC has achieved significant advancements. Today, the number of EUV lithography machines has increased tenfold, while wafer output nowadays is 30 times that of 2019.

Weigh Between Cost and Technology

In addition to potential technology bottlenecks, higher cost may be another problem. Per a report from Bloomberg, TSMC’s Senior Vice President of Business Development and Co-Chief Operating Officer, Dr. Kevin Zhang, remarked that while he appreciates the capabilities of High-NA EUV, he finds its price tag to be unlikeable.

As per the same report from Bloomberg, ASML’s new High-NA EUV machine is priced at EUR 350 million (roughly USD 380 million). Jiwei further stated the unit price may more than double, comparing with the current EUV machines (roughly EUR 170 million).

Market demand would be another major concern. Citing an industry insider, Jiwei analyzed that the cost of manufacturing chips with High-NA lithography machines increases significantly. While more chips can be cut from each wafer, more chips need to be sold to recoup the investment.

The report stated that the smartphone AP chip market alone cannot absorb these cost without the supporting demand of AI chips. However, as China, the largest market for AI, is now being restricted by export control measures from the U.S., the overall market demand remain uncertain.

Adoption Timing for High-NA EUV? TSMC May Not Be in a Hurry

Then what would be the right timing for TSMC to adopt High-NA EUV?

The report by Jimwei took the trajectory of EUV as an example. When the industry generally regarded EUV essential in the 7nm node, TSMC successfully launched its first 7nm production line using mature DUV lithography. This strategy allowed TSMC to avoid the imperfections and high costs of EUV lithography at that time.

TSMC waited until 2019 to start the usage of EUV in its N7+ process when the technology has become mature enough. In the end, in spite of Samsung’s early adoption of EUV, yield issues allowed TSMC to win the favor of clients.

Similarly, in the race for the 3nm process, instead of rushing to adopt GAAFET, TSMC chose the reliable FinFET route. Despite Samsung’s early lead with 3nm, their low yields and repeated delays enabled TSMC to surpass them.

TSMC’s previously announced roadmap indicates that the 1.4nm A14 process is expected to be introduced between 2027 and 2028, while the development of the 1nm A10 process is projected to be completed before 2030. The report by Jiwei suggested that TSMC might consider using the next-generation lithography machine only after the 1nm process is in place, potentially adopting the High-NA EUV system around 2029 to 2030.

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• [News] How Costly is the High-NA EUV? TSMC Reportedly Shocked, Considering Not Using the Equipment in its A16 Nodes
• [News] Intel to Adopt New High-NA EUV, High Costs Could Lead to Increased Losses

(Photo credit: ASML)

TSMC’s Nanjing plant has averted an export permit expiration crisis. On May 23rd, TSMC confirmed that it has recently received the “Validated End-User” (VEU) authorization from the U.S. Department of Commerce for TSMC (Nanjing) Co., Ltd., according to a report by Commercial Times.

Currently, the same report noted that the Nanjing plant focuses on mature processes such as 16nm and 28nm, and will continue to expand to meet customer demand. With the official U.S. authorization, the plant will no longer require individual case reviews.

TSMC stated that this formal VEU authorization replaces the temporary written authorization issued by the Department of Commerce since October 2022. The VEU does not grant new privileges but confirms that the items and services covered under U.S. export control regulations can continue to be supplied to TSMC (Nanjing) Co., Ltd. without the need for individual licenses from suppliers.

The VEU authorization allows TSMC’s Nanjing plant to maintain its current production status. Industry sources cited by Commercial Times noted that, although TSMC received its indefinite exemption later than Samsung, it has not affected TSMC’s competitiveness in the local market. Offering more competitive specialized processes is the key to TSMC’s continued customer trust.

Industry sources cited in the same report further pointed out that more specialized processes help TSMC tackle geopolitical risk challenges. For example, in the panel driver IC sector, after beginning mass production of 28nm high-voltage products this year, TSMC is now developing a 16nm high-voltage FinFET process to enable customers to design more competitive OLED panel driver ICs.

Additionally, TSMC is reportedly collaborating with customers to validate its 16nm consumer-grade products and co-develop automotive-grade 16nm magnetic random-access memory (MRAM) technology. TSMC is also progressing towards higher storage density and lower cost solutions in preparation for the next generation of 16nm MRAM.

TSMC is also accelerating its deployment of future technology applications such as software-defined vehicles (SDVs), smart sensors, and edge AI, developing the most suitable products for various regional markets, spanning from China, United States, Japan, and Germany.

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• [News] TSMC’s Nanjing Plant Reportedly Pushes for Indefinite Exemption From US Before the May 31 Deadline
• [News] TSMC More Ambitious on CoWoS Capacity Expansion, Targeting 60% CAGR by 2026

(Photo credit: TSMC)

According to a report from TechNews, TSMC held a technology forum on May 23, where Senior Fab Director pointed out that benefiting from HPC and mobile phone demands, the 3nm production capacity this year has more than tripled compared to last year, but this is actually still not enough, so efforts are still being made to meet customer demand.

During the forum, TSMC also indicated that its compound annual growth rate (CAGR) in advanced processes below 7nm surpassed 25% from 2020 to 2024. Moreover, TSMC remains committed to investment, with capital expenditure in 2024 increasing by 10% compared to the preceding four years.

Due to the booming demand for AI and HPC, TSMC is actively expanding its capacity for advanced processes. Huang stated that TSMC’s capacity for SoIC and CoWoS is experiencing CAGRs exceeding 100% and 60%, respectively, from 2022 to 2026.

The topic of TSMC’s manufacturing has always been a focus of the industry. In the past, it was presented by Executive Vice President and Co-Chief Operating Officer Y.P. Chyn, Vice President of Fab Operations I Dr. Y.L. Wang, and TSMC Vice President of Advanced Technology and Mask Engineering Dr. T.S. Chang. This time, it is presented for the first time by the key driver of the most advanced process and plant-level executives in Taiwan.

He mentioned that the share of TSMC’s special processes in maturity has also steadily increased, from 61% in 2020 to the target of 67% in 2024.

Huang further pointed out that TSMC averaged the construction of five fabs per year  between 2022 and 2023, increasing to seven this year. Among them are three fabs, two packaging plants, and two overseas facilities.

Fab 20 in Hsinchu and Fab 22 in Kaohsiung are both 2nm fabs, progressing smoothly and expected to commence production next year.

Taichung AP5 is expanding its capacity to meet the needs for CoWoS production, while the recently announced advanced packaging investment in Chiayi is for CoWoS and SOIC production.

In terms of global deployment, three fabs are planned in Arizona, USA. The first fab is already had its first tool-in, set to commence 4nm production next year, while the second fab is scheduled for 2028 production, and the third fab is expected to begin production by the end of the 2020s. In Japan, Kumamoto Fab 1 is slated for production in the fourth quarter of this year, with Fab 2 set for production in 2027.

In Europe, the Dresden fab will offer 16nm technology, with construction beginning in the fourth quarter of this year and production slated for 2027, mainly to meet European customer needs. Additionally, Nanjing Fab 16 in China continues to expand its 28nm capacity.

When discussing the application of EUV technology, he mentioned that TSMC’s EUV machine count has grown tenfold since 2019, now accounting for 65% of the global total. Both wafer output and efficiency have significantly increased along with learning.

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• [News] TSMC’s Nanjing Plant Reportedly Pushes for Indefinite Exemption From US Before the May 31 Deadline
• [News] TSMC More Ambitious on CoWoS Capacity Expansion, Targeting 60% CAGR by 2026

(Photo credit: TSMC)

In October 2022, the U.S. imposed a new wave of chip controls on China, but TSMC ultimately received an extension of its exemption permit from the U.S. Department of Commerce for one year. This exemption is set to expire on May 31, potentially impacting the shipment schedule of the Nanjing plant.

TSMC stated that in October last year, the company applied for an indefinite exemption from the Bureau of Industry and Security (BIS) of the U.S. Department of Commerce, and the process is still ongoing. As per a report from Commercial Times, industry sources have noted that if a new permit is not obtained, the Nanjing plant will need to apply for export permits on a case-by-case basis for certain items sourced from the U.S. starting June 1.

The U.S.-China trade war, which began in 2018, saw the U.S. impose stricter export controls in October 2022 on certain high-performance computing chips and semiconductor production items when exported to specific countries. While South Korean semiconductor companies like Samsung have received indefinite extension exemptions for semiconductor equipment controls in China, TSMC’s Nanjing subsidiary only secured a one-year exemption from the U.S. government, drawing significant attention.

Currently, TSMC operates 12-inch fabs in both Nanjing and Songjiang, Shanghai, along with 8-inch fabs, catering to local chip design companies. The most advanced process is at 16 nanometers. Over the past five years, TSMC’s revenue share from China has gradually declined from 20% in 2019 to 12% in 2023.

The latest news from TSMC indicates that it has obtained “Validated End User (VEU)” authorization, according to Commercial Times. However, according to TSMC’s annual report, there is no guarantee that the authorization obtained will not be terminated in the future.

TSMC emphasizes that while global trade barriers may increase the company’s production costs, its operations have not been significantly impacted so far. However, with the deepening of global trade tensions, related regulations, laws, and measures may still have negative effects on its business and operations. TSMC also reiterates its commitment to continue monitoring changes in trade policies and measures among major economies and taking corresponding measures based on subsequent developments.

Industry sources cited by the same report predict that the need for TSMC’s Nanjing plant to apply for export permits on a case-by-case basis in the future will inevitably increase operational procedures and extend the wafer shipment schedule in that region.

Additionally, on June 4th, TSMC’s shareholders will hold a comprehensive election for the board of directors. One of the independent directors, Ursula Burns, also serves as the Vice Chair of the Supply Chain Competitiveness Advisory Committee for the U.S. Department of Commerce. Orders from specific countries will undoubtedly receive close attention from the board of directors in the future.

Besides China, TSMC’s global expansion has also reached locations in the United States, Japan, and Germany, solidifying its goal of being a “long-term and trustworthy provider of technology and capacity.”

TSMC’s Kumamoto Plant in Japan held its opening ceremony in February, with mass production expected to begin in the fourth quarter. Meanwhile, as per a previous report from Reuters, TSMC will start construction of its first chip plant in Europe in Dresden, eastern Germany. The project is scheduled to commence in the fourth quarter of this year, with production expected to begin in 2027.

In contrast, the construction progress of its Arizona plant in the United States has been relatively slow. Due to the delay in the first phase’s production timeline from the end of 2024 to the first half of 2025, the production schedule for the second phase will also be postponed to start after 2027.

Read more

• [News] Apple COO Rumored to Make Secret Visit to TSMC, Booking Advanced Capacity for AI In-house Chips
• [News] Apple M4 Incoming, Boosting TSMC’s 3nm Production

(Photo credit: TSMC)