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Apple’s upcoming iPad Pro, featuring an OLED screen for the first time, is scheduled to be released in March or April. However, recent market reports suggest a potential 30% reduction in the estimated order volume, indicating Apple’s cautious outlook on the new product. It’s anticipated that suppliers in the supply chain such as LG Display (LGD), TSMC, Foxconn, and Novatek will also be affected.
Aju Korea Daily, citing industry sources, reported that Apple has reduced the OLED screen orders for its new iPad Pro. The initial order of 10 million units has been adjusted to a range of 7 million to 8 million units. LGD is expected to be the most impacted, with the supply scale decreasing from 6 million units to a minimum of 3 million units, while Samsung maintains a supply of 4 million units.
Industry speculation suggests that the reduction in the initial order may be due to a cautious outlook on the demand in the early stages of the product launch. The pricing of the new iPad Pro has not been determined, but it is likely to be higher than the current iPad with an LCD screen.
Historically, all iPad models from Apple have utilized LCD panels. However, this year’s release of the 11-inch and 12.9-inch iPad Pro models marks the first time Apple is incorporating OLED panels.
On another note, in addition to applying OLED screens to the iPad Pro this year, Apple reportedly plans to use them in future laptop products such as the MacBook. Therefore, the performance of the OLED iPad in terms of sales will serve as a significant market indicator for Apple’s future ventures into OLED technology.
Additionally, the adoption of OLED screens will result in an increase in the price of the iPad Pro. The loyalty of iPad consumers has traditionally been lower than that of iPhone users, posing a challenge for Apple in achieving strong performance this year.
The estimated order volume reduction is expected to have an impact on the iPad Pro supply chain, affecting key manufacturers such as TSMC, Foxconn, and Novatek.
According to sources cited by the Economic Daily News, TSMC is the exclusive supplier of Apple’s chips, while Foxconn is the main assembly plant for the iPad Pro. Novatek is a supplier of OLED screen driver ICs for the Korean market. However, the mentioned companies have refrained from commenting on specific clients and products.
TSMC has been the primary manufacturer of main chips for various Apple devices. Last year, there were reports in the market that Apple secured TSMC’s 3-nanometer production capacity for at least a year.
Despite current market uncertainties, TSMC estimates that the semiconductor market will see a growth of over 10% this year, with the foundry industry expected to grow by 20%. TSMC’s financial performance is projected to outpace industry standards, demonstrating quarterly growth.
Novatek previously indicated that there might be competition in the OLED driver IC sector this year. Nevertheless, the company plans to continue its strategic focus on advanced products such as applications for foldable devices, OLED touch, and integrated touch and display driver ICs (TDDI).
As for Foxconn, the company is gradually entering the traditional off-season. Seasonal performance is expected to be similar to the past three years. In the first quarter of 2023, higher shipment volume resulting from the resumption of normal production in Chinese factories post-pandemic is anticipated to lead to a year-on-year decline in performance for the first quarter of this year.
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(Photo credit: Apple)
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Fueled by the advancement in TSMC’s N3 process technology, the average selling price (ASP) of TSMC’s 12-inch wafers increased to USD 6,611 in the fourth quarter of 2023, registering a year-on-year growth of 22% despite the subdued semiconductor market.
According to a report by TechNews, Bernstein Research has indicated that the current growth in most semiconductor industries stems from the increase in pricing rather than a rise in chip shipment volumes.
As per a report by Tom’s Hardware, the wafer shipment volume of TSMC serves as evidence in many aspects. In the fourth quarter of 2023, TSMC’s shipment of 12-inch wafers was 2.957 million units, lower than the 3.702 million units in the fourth quarter of 2022. This marks the first time since 2020 that TSMC’s 12-inch wafer shipments have fallen below 3 million units. However, the revenue showed only a marginal decline.
Despite a significant 20.1% decrease in the fourth-quarter shipment volume of TSMC’s 12-inch wafers compared to the previous year, the revenue for the quarter reached USD 19.62 billion, only a 1.5% decrease from USD 19.93 billion in the fourth quarter of 2022.
Meanwhile, the average price of TSMC’s processed 12-inch wafers in the fourth quarter of 2023 reached USD 6,611 per unit, surpassing the USD 5,384 per unit in the fourth quarter of 2022. This is attributed to the increased shipment volume of wafers at the N3 process to customers, including Apple.
The report further cites sources indicating that TSMC may charge up to USD 20,000 per wafer manufactured using its N3 process. Although this figure may not be entirely accurate as TSMC’s pricing depends on various factors, the key point is that TSMC’s fees for the N3 process are higher compared to the N4/N5 or N6/N7 process.
Therefore, it can be argued that TSMC’s increase in manufacturing prices for process nodes has played a significant role in driving almost all growth in the semiconductor industry in recent years.
In essence, as time progresses, new process nodes will become increasingly expensive. The total chip shipments from 2019 to 2023 have actually decreased, but the ASP has significantly increased.
In particular, TSMC’s wafer revenue for the fourth quarter of 2023 was notably influenced by its N3 process, contributing 15%, while the N5 and N7 process contributed 39% and 17%, respectively.
This breakdown signifies that the N3 process node generated USD 2.943 billion in revenue for TSMC, the N5 process contributed USD 6.867 billion, and the N7 process brought in USD 3.3354 billion.
Overall, TSMC’s advanced process (N7, N5, N3) accounted for 67% of its total wafer revenue. Among these, revenues from System-on-Chip (SoC) used in smartphones and high-performance computing applications each constituted 43%, automotive chip revenue made up 5%, and IoT chip revenue contributed 5%.
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(Photo credit: TSMC)
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TSMC’s trillion-dollar investment plan for a 1nm fab is reportedly set to be established in the science park in Taibao City, Chiayi County, Taiwan. This follows TSMC’s recent announcement of the construction of its third 2nm fab in Kaohsiung, marking yet another strategic choice for advanced processes in southern Taiwan.
According to UDN’s report citing sources, TSMC has submitted a request for 100 hectares (roughly 247.10 acres) of land to the Southern Taiwan Science Park Administration, which oversees the Chiayi Science Park. Of this, 40 hectares (roughly 98.84 acres) are designated for an advanced packaging facility, while the remaining 60 hectares (roughly 148.26 Acres) are earmarked for the construction of a 1nm fab.
As TSMC’s land requirements exceed the initially planned 88 hectares (roughly 217.45 acres) in the first phase of the Chiayi Science Park, there are expectations for an accelerated expansion in the second phase to accommodate TSMC’s needs.
TSMC stated that the selection of the fab site involves various considerations. TSMC considers Taiwan as its primary base but does not rule out any possibilities, and continues to collaborate with the administration to assess suitable semiconductor fab sites. TSMC emphasized that all information should be primarily referred to the company’s official announcements.
As understood, the TSMC fab construction team conducted a site survey in the Chiayi Science Park in August of 2023, before it was incorporated into the jurisdiction of the Southern Taiwan Science Park Administration.
This move came after facing strong opposition during the third-phase expansion in the Longtan Science Park in Taoyuan. Following the intense protests, the TSMC construction team initiated a contingency plan and ultimately decided to abandon the construction project within the Longtan Science Park’s third-phase expansion.
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(Photo credit: TSMC)
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According to industry sources cited by South Korean media The Chosun Daily, Samsung has commenced the production of prototypes for its second-generation 3nm process and is testing the chip’s performance and reliability. The goal is to achieve a yield rate of over 60% within the next six months.
TSMC and Samsung are both actively vying for customers. Samsung is preparing to commence mass production of the second-generation 3nm GAA architecture in the first half of the year. The key to success in the competition lies in whether Samsung can meet the demands of major clients such as Nvidia, Qualcomm, AMD, and simultaneously achieve a rapid increase in production.
Samsung is currently testing the performance and reliability of prototypes for the second-generation 3nm process, with the initial product set to feature in the soon-to-be-released Galaxy Watch 7 application processor (AP). It is expected to be used in the Galaxy S25 series Exynos 2500 chip next year.
If the production yield and performance of the second-generation 3nm process are stable, there is a chance that customers who had previously switched to TSMC may return to Samsung, especially considering Qualcomm’s movements.
As per report, Qualcomm is collaborating with TSMC in the production of the next-generation Snapdragon 8 Gen 3. Additionally, Nvidia’s H200, B100, and AMD’s MI300X are expected to adopt TSMC’s 3nm process.
Samsung announced in November of last year that it would commence mass production of the second-generation 3nm process in the latter half of 2024. While Samsung has not responded to Chosun’s report regarding the production of prototypes for the second-generation 3nm process, the timeline seems plausible.
However, the report mentions a chip yield rate of 60% without specifying transistor count, chip size, performance, power consumption, or other specifications.
Furthermore, according to Tom’s Hardware’s report, the chip size, performance, and power consumption targets for processors used in smartwatches, mobile phones, and data centers are entirely different. A 60% yield rate for small chips would make commercial use challenging, but for chips with a reticle size of 60% yield rate, it would be reasonably acceptable.
However, caution is advised in interpreting this report due to the uncertainties surrounding Samsung’s second-generation 3nm process production targets at its semiconductor foundries.
Nonetheless, the commencement of the second-generation 3nm process production is a significant development for both Samsung and the semiconductor industry as a whole.
(Image: TSMC)
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TSMC announced during its briefing on the 18th that, due to robust demand in the 2-nanometer market, it plans to add another fab to the initially planned two fabs in Kaohsiung.
The company intends to use the 2-nanometer process for all three fabs in Kaohsiung, in addition to the originally planned 2-nanometer fab in Hsinchu’s Baoshan. Furthermore, the land recently acquired in Hsinchu Science Park will also be designated for a 2-nanometer fab. This reflects the strong preference for the 2-nanometer process among customers and underscores TSMC’s confidence in its in-house 2-nanometer process technology.
According to a report by TechNews following the briefing on the 18th, TSMC’s CFO Wendell Huang, stated in a media gathering that the strong demand in the high-performance computing and smartphone markets prompted the decision to increase the number of fabs in Kaohsiung from the originally planned two to three. Once the three 2-nanometer fabs are in full production, Kaohsiung will become a crucial manufacturing hub for TSMC’s 2-nanometer process.
In addition, with the recent approval from the Ministry of the Interior’s Urban Planning Commission, the land in Hsinchu Science Park designated for TSMC’s use, expected to be available in June 2024, is also being planned for a 2-nanometer fab.
Recent market reports suggest that TSMC, the leading semiconductor foundry, is set to proceed as scheduled with its plan to adopt the GAA (Gate-All-Around) architecture from the 2-nanometer process onward.
The P1 wafer fab in Baoshan, located in the Hsinchu Science Park, is anticipated to begin equipment installation as early as April 2024, while the Kaohsiung fab is projected to commence production using the GAA architecture for the 2-nanometer process technology in 2025.
Furthermore, in response to Intel securing the first High-NA EUV exposure equipment from ASML for its 18A advanced process, TSMC has indicated that it is also planning for High-NA EUV exposure equipment. However, the current timeline anticipates engineering verification of the High-NA EUV exposure equipment in 2024, with gradual integration into the manufacturing process set to follow.
(Image: TSMC)