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The shortage of advanced packaging production capacity is anticipated to end earlier than expected. Industry suggests that Samsung’s inclusion in providing HBM3 production capacity has led to an increased supply of memory essential for advanced packaging. Coupled with TSMC’s strategy of enhancing advanced packaging production capacity through equipment modifications and partial outsourcing, and the adjustments made by some CSP in designs and placing orders, the bottleneck in advanced packaging capacity is poised to open up as early as the first quarter of the upcoming year, surpassing industry predictions by one quarter to half a year, according to the UDN News.
TSMC refrains from commenting on market speculations, while Samsung has already issued a press release signaling the expansion of HBM3 product sales to meet the growing demand for the new interface, concurrently boosting the share of advanced processes.
Industry indicates that the previous global shortage of AI chips primarily resulted from inadequate advanced packaging capacity. Now the shortage in advanced packaging capacity is expected to end sooner, it implies a positive shift in the supply of AI chips.
Samsung, alongside Micron and SK Hynix, is a key partner for TSMC in advanced packaging. In a recent press release, Samsung underscores its close collaboration with TSMC in previous generations and the current high-bandwidth memory (HBM) technology, supporting the compatibility of the CoWoS process and the interconnectivity of HBM. Having joined the TSMC OIP 3DFabric Alliance in 2022, Samsung is set to broaden its scope of work and provide solutions for future generations of HBM.
Previously, the industry points out that the earlier shortage of AI chips stemmed from three main factors: insufficient advanced packaging capacity, tight HBM3 memory capacity, and some CSPs repeatedly placing orders. Now, the obstacles related to these factors are gradually being overcome. In addition to TSMC and Samsung’s commitment to increasing advanced packaging capacity, CSPs are adjusting designs, reducing the usage of advanced packaging, and canceling previous repeated orders – all of which are the key factors.
TSMC’s ongoing collaboration with OSATs(Outsourced Semiconductor Assembly And Test) to expedite WoS capacity expansion is gaining momentum. NVIDIA confirmed during a recent financial calls that it has certified other CoWoS advanced packaging suppliers’ capacity as a backup. Industry speculation suggests that certifying the capacity of other CoWoS suppliers for both part of the front-end and back-end production will contribute to TSMC and its partners achieving the target of reaching a monthly CoWoS capacity of approximately 40,000 pieces in the first quarter of the next year.
Furthermore, previous challenges in expanding advanced packaging production capacity, especially in obtaining overseas equipment, are gradually being overcome. With equipment optimization, more capacity is being extracted, alleviating the shortage of AI chip capacity.
(Image: Samsung)
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Nvidia CFO, Colette Kress, recently hinted again that the next-gen chips might be outsourced to Intel Corp. During the call with semiconductor analyst Tim Arcuri at the UBS Global Technology Conference on November 28th, she was asked whether Intel would be considered as a foundry partner for the next-gen chips.
In response, she stated that there are many powerful foundries in the market. TSMC and Samsung Electronics have been great partners. She said, “we’d love to have a third one,” when answering whether Nvidia want a third partner.
Kress also mentioned that, TSMC’s and others’ US fab may also be their options, and “there is nothing necessarily different but again in terms of different region. Nothing will stop us from potentially adding another foundry.”
Kress highlighted that Nvidia’s current data center GPUs designed for AI and high-performance computing (HPC) are predominantly outsourced to TSMC. However, in the previous generation, Nvidia’s gaming GPUs were mainly entrusted to Samsung for fabrication. According to Sedaily, Samsung’s foundry was responsible for manufacturing Nvidia’s GeForce RTX 30 series gaming GPUs based on the Ampere architecture.
Speaking of foundry partners for AI products, Nvidia anticipates that TSMC will remain a crucial foundry partner for producing AI Hopper H200 and Blackwell B100 GPUs. Any additional orders might be entrusted to Samsung.
Nvidia CEO previously said Intel’s next-gen process test chips “look good”
Additionally, reports from Barron also mentioned that on May 30th, during an interaction with journalists in Taiwan, Nvidia CEO Jensen Huang was asked whether Nvidia is considering diversifying its supplier base given the rising tensions between the U.S. and China. In response, Huang referred to Nvidia’s long-standing collaboration with TSMC and Samsung Electronics, stating, “We have a lot of customers depending on us. And so our supply chain resilience is very important to us. We manufacture in as many places as we can.”
At that time, Huang also expressed, “We’re open to manufacturing with Intel. And (Intel CEO) Pat (Gelsinger) has said in the past that we’re evaluating their process, and we’ve recently received the test chip results of their next generation process and the results look good.”
From Nvidia CFO’s talk in November and Nvidia CEO’s response in May, it is obvious that, beyond TSMC and Samsung, Nvidia is thinking about a potential third foundry partner.
(Image: NVIDIA Hopper Architecture – H100 SXM)
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According to ChinaTimes’ report, Intel’s strides in European chip manufacturing are narrowing the gap with TSMC.
The Fab 34 in Ireland has taken a significant step in production using EUV for the first time, with Intel 4 technology equivalent to the original 7nm. The research firm IC Knowledge has once assessed that Intel 4 is ahead of TSMC’s 5nm process, emphasizing energy efficiency, which makes it more suitable for mobile devices.
Industry sources note that the upcoming Meteor Lake CPU will adopt the Intel 4 process, and Intel 3 is planned for release by the end of the year. With Intel’s Ireland facility entering mass production, it significantly reduces the gap with TSMC.
Meteor Lake is poised to become the first processor utilizing Intel 4 fabrication technology, marking a milestone as the inaugural process to support EUV lithography exposure.
While the Compute tile is manufactured using Intel 4, the Graphic tile, SoC tile, and IO tile are completed using TSMC’s 5/6nm process. Industry source suggests that TSMC still maintains superior yield rates and more advantageous production costs.
Intel is establishing an advanced semiconductor manufacturing value chain in Europe. Fab 34 in Leixlip, Ireland, is operational, and there are plans to build a fab in Magdeburg, Germany, and an assembly testing facility in Wroclaw, Poland. This positions Intel ahead of TSMC in global layout.
Intel aims to regain a leading position in process technology by 2025, and will receive the industry’s first set of High-NA EUV lithography exposure equipment by the end of the year. The “Intel 3” will kick off vigorously. As Moore’s Law reaches its limits, TSMC, as a frontrunner, will face a gradually narrowing gap with competitors.
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(Photo credit: Intel)
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The labor dispute sparked by TSMC’s venture into the United States is poised to come to a close. TSMC’s Arizona plant and the local labor union, Arizona Building and Construction Trades Council (AZBTC), announced an agreement yesterday. TSMC will collaborate with the local union to establish a workforce training program and maintain transparency on public safety issues.
However, TSMC also retains some flexibility, aiming to recruit local employees while seeking the option to hire foreign workers with “specialized experience” if deemed necessary.
It is anticipated that this agreement aligns with TSMC’s prior request for the dispatch of 500 professional equipment engineers from Taiwan to the United States. This move, with the successful acquisition of technical construction permits, is expected to facilitate the expedited installation of equipment, ensuring smooth operational processes in the future.
While TSMC’s move to set up a factory in the United States was fueled by favorable policies, it faced challenges as contractors were unfamiliar with U.S. regulations, causing delays in mechanical and electrical integration and cleanroom construction.
To expedite the installation of advanced process equipment for the groundbreaking four-nanometer fabrication process in the U.S., TSMC had to mobilize nearly 500 personnel from Taiwan for intensive installation work before system integration.
This decision sparked a strong backlash from the AZBTC, criticizing TSMC for disrespecting local technicians’ expertise and raising concerns about TSMC’s potential intention to introduce cheaper labor, impacting local job rights.
Although TSMC consistently emphasized maintaining good interactions with various unions in Arizona, some union representatives were displeased with TSMC’s practice of dispatching personnel through suppliers. Reportedly, they called on the state and federal governments to pressure TSMC, leading to unexpected delays in the installation of new equipment.
After months of negotiation between TSMC and AZBTC, an agreement was reached, listing agreed-upon priority areas, including union training, communication channels, and on-site personnel allocation. However, TSMC, considering global talent distribution, retained the flexibility to hire foreign construction personnel with specific expertise in certain circumstances.
According to the Greater Phoenix Economic Council(GPEC), the specific terms of the agreement reached between the two parties are as follows:
- Enhanced Workforce Training and Development
A highly skilled, diverse, and inclusive construction workforce is necessary to meet the timelines of the two fabs. The AZBTC intends to recruit a sufficient number of skilled workers to fulfill manpower requirements of TSMC Arizona’s contractors for the Project. TSMC Arizona will partner with AZBTC on the development of union workforce training programs and curricula. The goal will be to build a construction workforce that can support TSMC Arizona in the near and long term with employment opportunities.。
- Shared Commitment to Site Safety
TSMC Arizona is deeply committed to workplace safety in the operation of all its facilities. To enhance the partnership, TSMC Arizona will maintain transparency with AZBTC with regards to safety assessments, audits, incident records and improvement plans.
- Industry Leading, Global Workforce
TSMC Arizona is focused on hiring workers locally in the United States. The AZBTC workforce is highly skilled in constructing microchip manufacturing plants. Circumstances may require TSMC Arizona or its vendors to employ foreign workers with specialized experience.
- Open and Regular Communication
To ensure TSMC Arizona and AZBTC are fulfilling the spirit of the agreement outlined, and accountable to commitments made, ongoing communication and review via regular forums will be critical. A committee will be formed, consisting of members designated by the affiliated AZBTC unions and members designated by TSMC Arizona and the contractors. These meetings will be held quarterly, one of which will be an annual forecast meeting to project future workforce requirements.
The report notes that TSMC also mentioned in a joint statement that its construction of a fab in Arizona represents the largest single foreign direct investment in the state’s history. This wafer fab is set to be the most advanced semiconductor manufacturing base in the United States, creating thousands of stable and high-paying job opportunities locally.
The ongoing construction of the wafer fab’s two-phase project has already generated thousands of jobs in accordance with the prevailing industry wage standards for members of the AZBTC.
(Photo credit: TSMC)
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On the 7th, TSMC convened the 2023 Supply Chain Management Forum, C.C. Wei, President of TSMC, acknowledging persistent inflationary pressures, remains optimistic about 2024. He also cited the rapid growth of AI applications as a key driver of opportunities, reported by CTEE.
Wei addressed the pivotal role of semiconductors in AI development. Looking ahead, the focus extends to continual AI technology advancement and computational power enhancement, with a parallel emphasis on energy consumption reduction. Given projections of AI computational demand tripling in the next 2 years, addressing energy efficiency becomes paramount.
To meet escalating AI computational needs, Wei highlighted the imperative to develop technologies balancing high performance with effective power control. TSMC commits to providing ample production capacity to meet end-user demands while sustaining cost-efficiency.
Global supply chain resilience amid challenges from society, economy, and geopolitics. Collaborating with partners. TSMC navigates 3nm, advanced and specialty processes for capacity expansions, R&D for 2nm and beyond, and global production plans. The company aims to lead through cutting-edge technology and top-notch manufacturing services, fostering innovation for customers.
Apart from the insightful speech, Wei also presented the 2023 Excellent Performance Award during the forum. It recognized suppliers’ performance in technology collaboration, global production support, green manufacturing, fab construction management, production capacity, quality control and other categories. Companies like Applied Materials, ASM International, KLA, Lam Research, TOKYO ELECTRON LIMITED and others.
(Image: TSMC)