According to TechNews’ report, TSMC and Samsung fiercely compete in the semiconductor foundry sector. Earlier market reports suggested that Qualcomm’s Snapdragon 8 Gen 4 mobile processor might adopt a dual-foundry strategy with TSMC and Samsung manufacturing simultaneously.

However, according to the latest industry information, due to Samsung’s conservative expansion plan for next year’s 3nm production capacity and unstable yields, Qualcomm has officially canceled the plan to utilize Samsung for next year’s processors. The dual-sourcing model is now postponed until 2025.

Samsung began mass production of its first-generation 3nm GAA (SF3E) process at the end of June last year, marking Samsung’s initial use of the innovative GAA architecture for transistor technology. The second-generation 3nm process, 3GAP (SF3), will utilize the second-generation MBCFET architecture, optimizing it based on the foundation of the first-generation 3nm SF3E. It is expected to enter mass production in 2024.

The dual-foundry strategy for Qualcomm was initially leaked by the reputable source Revegnus via the X platform (formerly Twitter). It was mentioned that the Snapdragon 8 Gen 4 processor would adopt TSMC’s 3nm (N3E) process, while Samsung’s 3GAP process would be used for the Snapdragon 8 Gen 4 supplying Samsung’s Galaxy series smartphones. Other sources suggested that due to limited capacity at TSMC’s 3nm production, Qualcomm had to seek Samsung as an alternative chip foundry.

As a result, Qualcomm originally anticipated dual-foundry production with both TSMC and Samsung in 2024, with hopes of being the first customer for the 3GAP process. However, considering Samsung’s conservative 3nm production capacity plan for next year and the instability in yields, Qualcomm decided to scrap the plan and exclusively rely on TSMC, pushing the dual-foundry strategy to 2025.

Currently, TSMC’s 3nm process technology capacity is on the rise, with expectations that by the end of 2024, monthly production capacity will reach 100,000 wafers, and the revenue contribution will increase from the current 5% to 10%.

(Photo credit: Qualcomm)

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According to the South Korean media The Korea Economic Daily’s report, Samsung Electronics has established a new business unit dedicated to developing next-generation chip processing technology. The aim is to secure a leading position in the field of AI chips and foundry services.

The report indicates that the recently formed research team at Samsung will be led by Hyun Sang-jin, who was promoted to the position of general manager on November 29. He has been assigned the responsibility of ensuring a competitive advantage against competitors like TSMC in the technology landscape.

The team will be placed under Samsung’s chip research center within its Device Solutions (DS) division, which oversees its semiconductor business, as mentioned in the report.

Reportedly, insiders claim that Samsung aims for the latest technology developed by the team to lead the industry for the next decade or two, similar to the gate-all-around (GAA) transistor technology introduced by Samsung last year.

Samsung has previously stated that compared to the previous generation process, the 3-nanometer GAA process can deliver a 30% improvement in performance, a 50% reduction in power consumption, and a 45% reduction in chip size. In the report, Samsung also claimed that it is more energy-efficient compared to FinFET technology, which is utilized by the TSMC’s 3-nanometer process.

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• [News] IC Design Companies Seek Advanced Process Second Source, Overview of Competition Between TSMC and Samsung

(Photo credit: Samsung)

TSMC’s Chairman, Mark Liu, recently addressed the challenges posed by global fragmentation and emerging national security concerns, which may potentially lead to a slowdown in global innovation. Despite these concerns, Liu emphasized Taiwan’s ability to respond calmly. TSMC remains committed to advancing its manufacturing processes and collaborates closely with clients to establish an open innovation platform.

On November 22th, Liu spoke at a lecture organized by Chinese National Association of Industry and Commerce, Taiwan (CNAIC), focusing on “TSMC in the AI Era,” as reported by the Central News Agency (CNA). During the lecture, Liu highlighted that Taiwan’s semiconductor industry, serving as a cornerstone, plays a vital role in driving advancements in AI applications.

However, he also acknowledged that the ongoing US-China chip war has brought global fragmentation and raised national security concerns, potentially slow down the pace of global innovation. Despite these challenges, Liu expressed confidence in Taiwan’s ability to handle them effectively.

In terms of  latest updates on TSMC’s global fabs, Liu mentioned positive communication with local unions in the US, showcasing TSMC’s ability to adapt and learn from new experiences. He also commended the high-quality and dedicated personality of Japanese engineers during his visit to Japan.

TSMC’s fab in Arizona, employing nearly 1,100 local staff, continues to recruit talents with plans for mass production to commence in 2025. The Kumamoto fab in Japan is expected to initiate production of 12nm, 16nm, 22nm, and 28nm processes by the end of the next year.

Regarding TSMC’s upcoming fab in Germany, the company aims to establish a specialized wafer fab focusing on automotive and industrial applications. This fab will produce 12nm, 16nm, 22nm, and 28nm processes, with construction set to begin in the second half of the next year and production slated for the end of 2027.

[News] TSMC’s Fab in Germany Progress Reports Potential Setback in Manager Selection?

Rise of Nvidia and other fabless companies, anticipating 10% growth in the next five years

Looking forward to the future tech landscape, Liu also anticipated Nvidia’s emergence as the world’s largest semiconductor company in 2023. From recent financial reports, Nvidia’s Q3 revenue reached USD 18.12 billion, surpassing TSMC’s USD 17.27 billion for the same quarter, as well as Intel’s USD 14.16 billion and Samsung Semiconductor’s USD 12.52 billion.

The rapid progress of Fabless companies also caught Liu’s eye. Fabless companies are expected to grow by around 10%, and IDMs by only 4% in the next five years. Additionally, he emphasized that semiconductor technology advances threefold every two years, projecting a 242-fold improvement over a decade.

What is “Fabless”?

Companies exclusively engaged in semiconductor design are referred to as “Fabless.” This term originates from the fact that these companies do not have their own fabrication. They are also known as “fabless semiconductor companies” due to their specialty of not owning production fab. Further categorization within fabless companies includes IC design and IP design.

Industry note that Nvidia’s growth as a fabless company is attributed to the surging demand for AI, including an optimized product portfolio. While Nvidia’s financial report mentioned geopolitical limitations and potential delays in H20’s launch, the company remains a global leader in AI computing. As for TSMC, it stands out as the most advanced pure-play foundry with its 3nm process, gradually increasing production in the second half of the year to alleviate inventory adjustment pressures within the rest of the 7nm family.
(Image: TSMC)

With 32 mature process wafer fabs set to be completed in China by the end of next year, Taiwanese wafer foundries are gearing up early in response to the “red alert.”

Faced with the pricing war, semiconductor insiders reveal that mature process foundries in Taiwan are anticipating a roughly 10% reduction in prices in the first quarter. The aim is to seize orders ahead of the competition and maintain high capacity utilization rates.

In contrast to traditional sales discounts, major semiconductor foundries like TSMC, UMC, and PSMC have recently introduced a “diversified” pricing strategy for IC design, including:

1. Volume Discounts: Significant price reductions are offered for orders exceeding ten thousand units, with pricing flexibility increasing as the order quantity grows.
2. Volume Tied Pricing: Maintaining a certain order volume, pricing has a degree of flexibility based on market conditions.
3. Deferred Wafer Delivery: Allowing the extension of the original wafer delivery timeline by one year or even longer, providing IC design firms with flexibility and reduced pressure when placing orders.
4. Dynamic Pricing: Rapid negotiations for urgent orders, reducing the risk of volume pressure for IC designers, albeit with relatively limited price flexibility.
5. Wafer Bank: Transforming wafers into semi-finished products stored in foundries, facilitating on-demand packaging and delivery when needed.

These initiatives are strategically positioned to capitalize on the anticipated recovery in consumer electronics demand next year.

Insiders reveal that due to the sluggish market conditions in the first quarter and the impact of an upcoming extended holiday, demand for the next quarter may not just be “cool” but could freeze.

Industry experts characterize this downturn as an “L-shaped bottom,” and if orders are taken by Chinese foundries before the recovery, Taiwanese foundries will lose out on the subsequent rebound. Consequently, the three major mature process wafer foundries in Taiwan are compelled to lower prices in advance, with an estimated price reduction of around 10% for the next quarter. However, the foundries refrain from commenting on pricing.

Historically, major domestic mature process fabs maintained stable prices but offered discounts by shipping more wafers than ordered. In an effort to boost high capacity utilization and secure orders early, these fabs will no longer stick to stable pricing in the first quarter of next year.

Instead, they have adopted a direct price reduction of 10% for orders exceeding 10,000 wafers. IC design companies estimate that as benchmark fabs initiate price reductions, other industry players will inevitably follow suit.

While the extent of price reduction varies depending on products and processes, an average price reduction of 10-20% for wafer foundry services in the first quarter of next year is anticipated.

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(Photo credit: TSMC)

Recent reports from the IC design industry suggest that TSMC, the leading semiconductor foundry, is contemplating a slight price concession for certain mature processes next year, marking a return after three years. Despite its reputation for firm pricing, TSMC’s willingness to make concessions is seen as a response to a decrease in capacity utilization. According to UDN News, this shift may indicate the broader trend of semiconductor foundries facing pricing pressures due to lower capacity utilization.

Known for its stable pricing with minimal fluctuations, TSMC typically offers single-digit percentage annual concessions to clients. The reported concession for specific mature processes is estimated to be around 2%. TSMC, however, declined to comment on these pricing adjustments.

Several IC design companies have confirmed ongoing negotiations with TSMC regarding price concessions for the upcoming year. One disclosed that TSMC’s concession method involves settling after the completion of a full quarter’s production, offsetting the next quarter’s mask costs. This approach allows for low single-digit percentage concessions in the following quarters.

Industry sources suggest that other semiconductor foundries have already taken significant measures, such as direct price reductions on large orders and providing additional free wafer allocations, aiming to boost capacity utilization. Chinese chipmakers initiated price reductions earlier and more aggressively than their Taiwanese counterparts, maintaining TSMC’s relatively firm pricing.

The news of TSMC considering concessions for certain mature processes, while not a direct price reduction, holds indicative significance. It is likely to exert pricing pressure on other industry players with mature processes before the peak season arrives in the latter half of next year.

During the semiconductor shortage in recent years, TSMC initially refrained from raising prices. As a result, its pricing remained relatively lower, even the lowest, compared to other industry players who significantly increased their prices. TSMC reportedly canceled concessions in 2021 and 2022 and initiated a rare price increase at the beginning of 2023, rumored to be in the range of 3% to 6%.

However, with the semiconductor market reversing, the supply chain has been gradually adjusting inventory since the second half of 2022. In the first half of this year, TSMC reportedly introduced an “increase quantity feedback plan,” offering additional mature process wafer allocations for orders reaching a certain quantity.

Although TSMC relies on advanced processes for over 50% of its revenue, with mature processes not being its primary focus, they remain a market consideration.

(Image: TSMC)