According to a report from Taiwan’s TechNews, NVIDIA has delivered impressive results in its latest financial report, coupled with an optimistic outlook for its financial projections. This demonstrates that the demand for AI remains robust for the coming quarters. Currently, NVIDIA’s H100 and A100 chips both utilize TSMC’s CoWoS advanced packaging technology, making TSMC’s production capacity a crucial factor.

Examining the core GPU market, NVIDIA holds a dominant market share of 90%, while AMD accounts for about 10%. While other companies might adopt Google’s TPU or develop customized chips, they currently lack significant operational cost advantages.

In the short term, the shortage of CoWoS has led to tight chip supplies. However, according to a recent report by Morgan Stanley Securities, NVIDIA believes that TSMC’s CoWoS capacity won’t restrict shipments of the next quarter’s H100 GPUs. The company anticipates an increase in supply for each quarter next year. Simultaneously, TSMC is raising CoWoS prices by 20% for rush orders, indicating that the anticipated CoWoS bottleneck might alleviate.

According to industry sources, NVIDIA is actively diversifying its CoWoS supply chain away from TSMC. UMC, ASE, Amkor, and SPIL are significant players in this effort. Currently, UMC is expanding its interposer production capacity, aiming to double its capacity to relieve the tight CoWoS supply situation.

According to Morgan Stanley Securities, TSMC’s monthly CoWoS capacity this year is around 11,000 wafers, projected to reach 25,000 wafers by the end of next year. Non-TSMC CoWoS supply chain’s monthly capacity can reach 3,000 wafers, with a planned increase to 5,000 wafers by the end of next year.

(Photo credit: TSMC)

According to a report from Taiwan’s Commercial Times, NVIDIA is aggressively establishing a non-TSMC CoWoS supply chain. Sources in the supply chain reveal that UMC is proactively expanding silicon interposer capacity, doubling it in advance, and now planning to further increase production by over two times. The monthly capacity for silicon interposers will surge from the current 3 kwpm (thousand wafers per month) to 10 kwpm, potentially aligning its capacity with TSMC’s next year, significantly alleviating the supply strain in the CoWoS process.

A prior report from Nomura Securities highlighted NVIDIA’s efforts since the end of Q2 this year to construct a non-TSMC supply chain. Key players include UMC for wafer fabrication, Amkor and SPIL for packaging and testing. NVIDIA aims to add suppliers to meet the surging demand for CoWoS solutions.

The pivotal challenge in expanding CoWoS production lies in insufficient silicon interposer supply. In the future, UMC will provide the silicon interposers for front-end CoW process, while Amkor and SPLI will take charge of the back-end WoS packaging. These collaborations will establish a non-TSMC CoWoS supply chain.

UMC states its current silicon interposer capacity stands at 3 kwpm. However, the company has decided to undertake a one-fold expansion at its Singaporean plant, targeting a capacity of around 6 kwpm. The additional capacity is anticipated to be progressively operational within 6 to 9 months, with the earliest projections for the first quarter of next year.

Yet, due to persistent robust market demand, it’s expected that even with UMC’s capacity expansion to 6 kwpm, it may not completely meet market needs. Consequently, industry sources suggest UMC has opted to further amplify silicon interposer capacity to 10 kwpm, aiming for a two-fold acceleration of production expansion. Addressing these expansion rumors, UMC affirms that growth in advanced packaging demand is an inherent trend and future focus, asserting their evaluation of capacity options and not ruling out the possibility of continuous enlargement of silicon interposer capabilities.

(Photo credit: Amkor)

According to a report by Taiwan’s Commercial Times, JPMorgan’s latest analysis reveals that AI demand will remain robust in the second half of the year. Encouragingly, TSMC’s CoWoS capacity expansion progress is set to exceed expectations, with production capacity projected to reach 28,000 to 30,000 wafers per month by the end of next year.

The trajectory of CoWoS capacity expansion is anticipated to accelerate notably in the latter half of 2024. This trend isn’t limited to TSMC alone; other players outside the TSMC are also actively expanding their CoWoS-like production capabilities to meet the soaring demands of AI applications.

Gokul Hariharan, Head of Research for JPMorgan Taiwan, highlighted that industry surveys indicate strong and unabated AI demand in the latter half of the year. Shortages amounting to 20% to 30% are observed with CoWoS capacity being a key bottleneck and high-bandwidth memory (HBM) also facing supply shortages.

JPMorgan’s estimates indicate that Nvidia will account for 60% of the overall CoWoS demand in 2023. TSMC is expected to produce around 1.8 to 1.9 million sets of H100 chips, followed by significant demand from Broadcom, AWS’ Inferentia chips, and Xilinx. Looking ahead to 2024, TSMC’s continuous capacity expansion is projected to supply Nvidia with approximately 4.1 to 4.2 million sets of H100 chips.

Apart from TSMC’s proactive expansion of CoWoS capacity, Hariharan predicts that other assembly and test facilities are also accelerating their expansion of CoWoS-like capacities.

For instance, UMC is preparing to have a monthly capacity of 5,000 to 6,000 wafers for the interposer layer by the latter half of 2024. Amkor is expected to provide a certain capacity for chip-on-wafer stacking technology, and ASE Group will offer chip-on-substrate bonding capacity. However, these additional capacities might face challenges in ramping up production for the latest products like H100, potentially focusing more on older-generation products like A100 and A800.

(Photo credit: TSMC)

According to the news from Money UDN, amid a tough semiconductor market, once-stable long-term contracts for silicon wafer makers have turned uncertain. A major Taiwanese foundry seeks price cuts in upcoming contracts from a Japanese supplier. Intense negotiations are ongoing, potentially affecting industry dynamics and pricing strategies due to the Japanese suppliers’ pivotal role in the supply chain.

Market insiders suggest silicon wafer makers may resist price reductions due to their vital role in foundries. Reports hint at foundries’ challenges and the ripple effects on critical materials suppliers.

Globally, Japan’s Shin-Etsu and SUMCO are top silicon wafer suppliers, trailed by Taiwan’s GlobalWafers, Germany’s Siltronic, and South Korea’s SK Siltron. And Taiwan SUMCO joint venture with Formosa Plastics Group as “Formosa Sumco Technology”, and other companies like Wafer Works. With over 30% market share, Shin-Etsu leads, closely followed by SUMCO, combining for around 55% to 60% global share.

Taiwan’s foundries include TSMC, UMC, VIS, and PSMC, among others. TSMC, with a global market share exceeding 50%, holds a leading position in the industry.

Silicon wafers are essential raw materials for semiconductor foundries, integrated device manufacturers (IDMs), and memory manufacturers. Presently, the standard duration for silicon wafer long-term contracts ranges from three to 8 years, specifying annual supply and demand quantities. In the previous semiconductor boom, these long-term contracts often featured escalating prices year by year.

Semiconductor market shifts led to reduced foundry capacity use, heightening tensions with silicon wafer makers’ clients. Delays emerged in the last quarter, leading to agreements between manufacturers and clients. This trend has persisted into the first half of this year. Silicon wafer industry insiders acknowledge slow end-market demand recovery and relatively high client inventories.

Amidst this situation of overflowing inventories, reports indicate that a major Taiwanese silicon wafer foundry is requesting Japanese silicon wafer suppliers to not only agree to further delays in this year’s contracted shipments but also to lower prices for next year. However, no formal agreement has been reached by the silicon wafer manufacturers at this stage.

A juridical person suggests that the negotiations are currently at a deadlock, and the situation might become clearer in the fourth quarter. If the silicon wafer manufacturers eventually concede, they are unlikely to publicly admit it, in order to prevent other clients from seeking similar adjustments and causing wider disruptions.

Market insiders also reveal that the Japanese silicon wafer manufacturers facing price reduction demands are currently operating relatively well and are adopting a firm stance. From the perspective of the foundries, they are hoping for support from their supply chain partners to alleviate the pressure. Normal silicon wafer inventories typically span two to three months, yet certain silicon wafer foundries are already grappling with high inventory levels, particularly for 8-inch wafers, which might persist throughout this year.

(Source: https://money.udn.com/money/story/5612/7366962)

Leading semiconductor companies are making significant strides in global expansion with the announcement of two new fabrication facilities. TSMC is set to greenlight a factory in Germany, while GlobalFoundries plans to establish its first 12-inch wafer plant in Singapore.

TSMC’s Bold Move: Germany’s Green Light

TSMC from its presence in the USA, China (Shanghai and Nanjing), to Japan (Kumamoto City), TSMC’s global manufacturing footprint is expanding. Reuters reported on August 7 that TSMC’s board is inclined to approve the construction of a plant in Dresden, Germany. The German government pledges a substantial 5 billion euros (about $5.49 billion USD) to support the facility. However, the German Ministry of Economy refrains from commenting on the matter.

TSMC has been negotiating with the Saxony German state since 2021 to establish a collaborative FAB plant. In partnership with Bosch, Infineon, and Onsemi, TSMC aims to utilize the Dresden plant primarily for automotive chip production. Pending board approval, this venture could involve financing discussions with Berlin, ultimately requiring European Commission endorsement. TSMC, Intel, and Wolfspeed stand out among chip manufacturers seeking government assistance for European manufacturing ventures.

GlobalFoundries Poised to Build 12-Inch Wafer Plant in Singapore

According to udn.com, GlobalFoundries is set to make a substantial investment in the establishment of a 12-inch wafer fabrication plant in Singapore. The project’s funding could exceed NT$100 billion (approximately $3.2 billion USD). Reports suggest that this Singaporean facility will focus on producing 28-nanometer chips, with a potential completion date as early as 2026.

Industry experts note that GlobalFoundries’ move to set up a 12-inch facility in Singapore implies a significant shift in the competitive landscape. TSMC, UMC, PSMC, and GlobalFoundries – the four major semiconductor foundries – will all possess 12-inch production capabilities. Additionally, each of these companies has international expansion plans for such facilities. Notably, TSMC’s ventures span across the USA and Japan, UMC, and GlobalFoundries are both targeting Singapore, while PSMC’s strategy involves establishing a plant in Japan in collaboration with local partners.

Major Manufacturers Expand Against the Current Downturn

TSMC has been proactive in its expansion strategy, unveiling plans for ten new facilities in the past two years. These include 5 wafer plants and 2 advanced packaging facilities in Taiwan, alongside 3 overseas wafer plants. Despite the industry’s current challenges, TSMC’s expansion momentum remains strong, driven by a heightened focus on global manufacturing diversity.

TSMC is well aware of the potential risks tied to significant expansion efforts. In its latest annual report, the company acknowledges that expanding on a global scale demands substantial resources, highlighting possible challenges like rising costs, workforce shortages, disasters, land scarcity, cyber threats, government support, cultural differences, intellectual property protection, and tax variations.

Expanding during a semiconductor downturn has become a strategic approach for the foundry players. Typically, a fab construction takes 2 to 4 years, with equipment installation lasting 0.5 to 1 year and production ramp-up stretching 1 to 2 years. Looking ahead, semiconductor foundries are gearing up for a fresh wave of capacity release throughout 2024 and 2025.

Despite the industry’s ongoing slump, encouraging signs suggest that the downturn might be reaching its conclusion. Industry experts are cautiously optimistic, anticipating the arrival of the next upswing in the cycle.

(Source: https://mp.weixin.qq.com/s/4Xu_uc58kG85E_6R4Y3qhQ)