News
As TSMC has reportedly begun trial production of 2nm chips in its Baoshan Plant in Hsinchu, northern Taiwan, the schedule of mass producing 2nm in 2025 remains on track. A report by Commercial Times reveals that the price of 2nm wafers is expected to double compared to 4/5nm, which may exceed USD 30,000 per wafer.
While the yield rates for advanced nodes of Intel and Samsung are rumored to be relatively low, the rising price of 2nm wafers reflects TSMC’s market monopoly as well as its strong pricing power, the report notes.
Citing comments by sources from semiconductor companies, the report states that fabs have invested heavily in advanced processes. For instance, the R&D investment of 3nm may exceed USD 4 billion, with key partners in TSMC’s supply chain, such as Taiwanese IP providers and material suppliers, playing a critical role.
On the other hand, executives from IC design houses cited by the report reveal that even from the perspective of IC design, the R&D cost for advanced nodes remains high. For instance, the development cost for 28nm is approximately USD 50 million, while 16nm may require an investment of USD 100 million. For 5nm, the R&D cost has soared to USD 550 million, if the expenditure on IP licensing, software verification, and design architecture are factored in.
According to the report, foundries have invested even more, with research institutions estimating that R&D expenses for 3nm may range from USD 4 billion to USD 5 billion. Additionally, constructing a 3nm fab is expected to cost at least USD 15 billion to USD 20 billion. All these factors may lead to the high pricing of wafers in the advanced nodes.
Therefore, for a foundry, the development of a new-generation of node involves massive efforts, and needed to be supported by partners in three key sectors: equipment, software (including IP and EDA tools), and materials, the report notes. Once their products have been validated by the foundry, suppliers can usually secure long-term partnership.
With 2nm set to debut in 2025, TSMC’s key suppliers are expected to see explosive profit growth, the report indicates. According to the report, Taiwanese IP firm M31, for example, has already developed IP that supports the 2nm platform for both smartphones and high-performance computing. Likewise, eMemory has disclosed that it is collaborating with leading foundries to develop 2nm.
On the other hand, as 2nm processes require thinner wafers, Taiwan-based materials companies, such as Kinik and Phoenix Silicon International Corp., have entered the markets of diamond discs and reclaimed wafers.
According to the report, in terms of reclaimed wafers, the market value for 2nm is approximately 4.6 times that of 28nm. In addition, the number of dummy wafers will also increase in advanced processes, which benefit suppliers with more volume and higher average prices.
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(Photo credit: TSMC)
News
Moments before TSMC’s earnings call, TSMC has released its financial results for the second quarter of 2024. Reportedly, TSMC announced consolidated revenue of NTD 673.51 billion, net income of NTD 247.85 billion, and diluted earnings per share of NTD 9.56 (USD 1.48 per ADR unit) for the quarter ended June 30, 2024.
(Photo credit: TSMC)
Compared to the same period last year, TSMC reported a 40.1% increase in second quarter revenue, with net income and diluted EPS also rising by 36.3%. Quarter-over-quarter comparisons with the first quarter of 2024 showed a 13.6% increase in revenue and a 9.9% increase in net income. All financial figures were prepared in accordance with TIFRS on a consolidated basis.
(Photo credit: TSMC)
In US dollars, TSMC’s second quarter revenue reached USD 20.82 billion, marking a 32.8% year-over-year increase and a 10.3% increase from the previous quarter. The quarter saw a gross margin of 53.2%, an operating margin of 42.5%, and a net profit margin of 36.8%.
During the second quarter, sales of 3-nanometer chips accounted for 15% (up from 9% of the first quarter) of total wafer revenue, while 5-nanometer chips accounted for 35%, and 7-nanometer chips accounted for 17%. Advanced technologies, including 7-nanometer and more advanced chips, constituted 67% of total wafer revenue.
(Photo credit: TSMC)
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(Photo credit: TSMC)
News
Taiwanese Semiconductor testing and packaging giant ASE announced today that its subsidiary, ASE Semiconductor, will lease the plant in Nanzih, Kaohsiung, owned by Taiwan’s ASE Test Inc., to expand its packaging capacity.
In the announcement, ASE Holdings revealed that ASE Semiconductor would lease a plant in Nanzih District, Kaohsiung, from its subsidiary ASE Test Inc. The total floor area of the building is approximately 15,600 square meters, with an estimated total usage rights asset value of NTD 742 million (approximately USD 23.8 million).
ASE Holdings stated that the primary purpose of this move is to optimize the overall planning and efficient utilization of plant space within the group, as well as to expand ASE’s packaging capacity.
According to CNA’s report, industry sources believe that ASE’s primary objective with this expansion is to enhance its production capacity for advanced packaging of Artificial Intelligence (AI) chips, but it is not directly related to CoWoS packaging.
Market insiders point out that ASE Holdings has been collaborating with foundry on technologies related to advanced packaging interposers and has CoWoS solutions. The earliest expected time for mass production is by the end of this year or early next year.
Reportedly, according to data, ASE’s Kaohsiung plant contributes to approximately 20% of ASE Holding’s overall revenue. The plant primarily provides services such as packaging, wafer bumping and probing, materials, and final testing.
The Kaohsiung plant is also establishing several smart plants, focusing on high-end processes, including Fan-Out packaging, System-in-Package (SiP), wafer bumping, and FlipChip packaging. These technologies find applications in various fields, including automotive, medical, IoT, high-speed computing, artificial intelligence, and application processors.
ASE actively positions itself in various advanced packaging technologies. Notably, the Fan-Out Chip on Substrate with Bridge (FOCoS-Bridge) packaging technology integrates multiple Application-Specific Integrated Circuits (ASICs) and High Bandwidth Memory (HBM), targeting the customized AI chip advanced packaging market.
In addition, ASE Semiconductor has introduced a cross-platform integrated design tool that combines several advanced packaging technologies, addressing the demands of advanced packaging for AI chips.
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(Photo credit: ASE)
News
In a bid to revitalize its semiconductor industry, Japan has enticed the sector with subsidies worth trillions of yen, aiming to attract both domestic and international semiconductor companies.
Leading semiconductor foundry Taiwan Semiconductor Manufacturing Co. (TSMC) has invested USD 8.6 billion to construct a factory in Kumamoto Plant, and it is considering building a second plant nearby. According to reports, TSMC is also contemplating a third plant within Kumamoto Prefecture to produce cutting-edge 3nm chips.
Apart from TSMC, major players like Samsung and Powerchip Semiconductor Manufacturing Corporation (PSMC) are actively investing in Japan. The initiatives of these giants have not only influenced semiconductor manufacturing equipment suppliers in Japan but also spurred them to accelerate technological research and expand production capacity.
As a result of these efforts, the investment of Japan’s six major semiconductor equipment suppliers has surged by 70% over the past five years.
TSMC Kumamoto New Plant Aims for Monthly Production of 55,000 12-Inch Wafers
Reportedly, the new chip plant in Kumamoto, Japan, operated by Japan Advanced Semiconductor Manufacturing (JASM), a joint venture between TSMC, Sony, and Denso, is poised for commencing production in the fourth quarter of 2024, while the plant’s production capacity will target a full capacity of 55,000 12-inch wafers per month.
Simultaneously, JASM aims to enhance the local contribution of semiconductor supply chain and ecosystem in Japan from the current 25% to 60% by 2030.
Meanwhile, according to sources cited by Bloomberg, TSMC has informed its supply chain partners that it is considering building a third factory in Kumamoto Plant in southern Japan, codenamed TSMC Fab-23 Phase 3.
TrendForce’s analysis mentioned that Japan’s expertise in semiconductor materials and machinery makes it an attractive location for TSMC’s expansion.
Additionally, Japan’s critical role in semiconductors and raw materials, coupled with collaboration with Sony, provides TSMC with significant advantages. TSMC’s investment in Japan is expected to facilitate access to advanced materials and expertise in CIS technology.
Furthermore, industry speculation suggests that in the future, Japan will not only continue subsidizing semiconductor manufacturing but also enhance collaboration between the semiconductor industry and academia to attract more talent to join the semiconductor industry.
PSMC Japanese Plant Aims for Monthly Production of 40,000 12-Inch Wafers
In late October, PSMC, in collaboration with SBI Holdings, Inc., the Miyagi Prefecture of Japan, and JSMC Corporation, signed a memorandum of understanding. The memorandum confirmed that JSMC’s first semiconductor wafer plant is expected to be located in the Second Northern Sendai Central Industrial Park in Ohira Village, Kurokawa District, Miyagi Prefecture (Second Northern Sendai Central Industrial Park).
The plant will produce 28nm, 40nm, and 55nm chips for automotive and industrial applications, with a planned monthly production of 40,000 12-inch wafers. Previous reports indicated that PSMC plans to construct multiple plants, with the first phase potentially starting construction as early as 2024, involving an investment of around JPY 400 billion (USD 2.6 billion).
The Japanese Ministry of Economy, Trade, and Industry (METI) is expected to provide up to JPY 140 billion in subsidies for the project, targeting operational commencement by 2026. The timeline and plans for the second phase are yet to be determined, with a total investment of approximately JPY 800 billion.
Regarding subsidies, PSMC stated that once Japan announces the subsidy amount for this semiconductor wafer plant investment, all relevant parties will reconfirm the effectiveness of this memorandum of understanding and proceed with the planned construction.
Is Foundry Revenue Expected to Continue its Upward Trend?
In the semiconductor industry chain, the significance of the foundry industry is self-evident. In recent years, the foundry sector has been affected by headwinds in end markets such as consumer electronics. However, as entering the latter half of the year, there are gradually emerging positive signals in the semiconductor industry.
According to TrendForce’s report on December 6th, looking ahead to 4Q23, TrendForce’s anticipation of year-end festive demand is expected to sustain the inflow of urgent orders for smartphones and laptops, particularly for smartphone components.
Although the end-user market is yet to fully recover, pre-sales season stockpiling for Chinese Android smartphones appears to be slightly better than expected, with demand for mid-to-low range 5G and 4G phone APs and continued interest in new iPhone models. This scenario suggests a continued upward trend for the top ten global foundries in Q4, potentially exceeding the growth rate seen in Q3.
According to the Semiconductor Equipment and Materials International (SEMI) report presented at SEMICON Japan 2023 on December 12, the global semiconductor equipment market is anticipated to experience a 6.1% year-on-year decline to USD 100.9 billion in sales for new equipment in 2023, marking the first contraction in four years.
However, the forecast for 2024 shows a reversal, with the semiconductor equipment market expected to grow by 4%, reaching USD 105.3 billion in sales. In 2025, a substantial increase of 18% is projected, surpassing the historical high of USD 107.4 billion in 2022.
SEMI CEO Ajit Manocha has noted that the semiconductor market exhibits cyclical patterns, with a short-term downturn expected in 2023. However, he anticipates a turning point towards recovery in 2024.
The year 2025 is poised for robust recovery, driven by increased production capacity, the construction of new wafer fabs, and growing demand for advanced technologies and solutions.
Major Companies Indirectly Boost Chip Equipment Investment in Japan, Surging 70% in 5 Years
According to a report by Nikkei, the proactive investments by semiconductor giants such as TSMC and Micron in Japan have accelerated technological innovations and production capacity expansion among Japanese chip equipment manufacturers.
The combined investment (including R&D and equipment investment) of Japan’s six major chip equipment firms, namely TEL, DISCO, Advantest, Lasertec, Tokyo Seimitsu, and Screen Holdings, for the fiscal year 2023 (April 2023 – March 2024) is approximately JPY 547 billion, marking a significant 70% increase compared to the 2018 fiscal year.
On December 13, Tokyo Electron Limited (TEL) President Tony Kawai stated at SEMICON Japan 2023 that the semiconductor market is projected to exceed USD 1 trillion by 2030, highlighting the immense potential within the industry.
On December 14, Hisashi Kanazashi, the Duputy Director at METI of Japan, noted that top overseas semiconductor firms plan to collaborate with Japan’s strength in “equipment” and expand their research and development presence in Japan.
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(Photo credit: TSMC)
Insights
Source to TrendForce, the most recent update on solar materials pricing indicates an ongoing decline in Polysilicon and Module prices, while Wafer and Cell prices are holding steady for the time being.
Polysilicon prices continue to decline throughout the week. The mainstream concluded price for mono recharge polysilicon is RMB 64/KG, while mono dense polysilicon is priced at RMB 62/KG and N-type polysilicon is currently priced at RMB 66/KG.
Looking at the market transaction dynamics, there’s not a significant volume of orders being placed. Some companies are gearing up for December’s order negotiations. Observing the price trend, polysilicon manufacturers are adjusting prices for both new and existing orders. Even some previously high-priced orders have experienced declines.
Furthermore, the average price of N-type polysilicon in new orders is generally below the 70000 yuan/ton mark. On the supply side, numerous projects are now in production, leading to a constant increase in the marginal increment of polysilicon and further swelling polysilicon inventory. Consequently, polysilicon manufacturers are grappling with increased pressure to de-stock.
Despite a month-on-month rise in operation rates for professional wafer manufacturers, creating additional demand for polysilicon, the surplus supply remains challenging to address.
This week, polysilicon prices continue their downward trajectory, and there’s a significant oversupply of polysilicon. Moreover, with customer installation demand still not turning positive, crystal pulling manufacturers are adopting a pessimistic stance toward future polysilicon prices, displaying a cautious approach to purchasing polysilicon.
On the flip side, polysilicon manufacturers are determined to maintain current prices and show no signs of reducing prices to clear inventory. In conclusion, a tug-of-war in pricing dynamics is evident between buyers and sellers.
The prices of wafer have maintained stable throughout the week. The mainstream concluded price for M10 P-type wafer is RMB 2.30/Pc, while G12 P-type wafer is priced at RMB 3.30/Pc and M10 N-type is priced at RMB2.40/Pc.
On the supply side, wafer inventory has returned to the reasonable range, sitting at approximately 1.3-1.5 billion pieces. Analyzing various wafer types, the inventory of 210mm P-type wafers has seen a notable decrease, with the consumption rate slowing due to weakened demand.
With the alleviation of inventory pressure, specialized wafer manufacturers are ramping up their operational rates, resulting in a slight month-on-month increase in wafer output. Turning to the demand side, cell manufacturers are indicating a reduction in the production of 182mm P-type cells, while there’s no change in output for other cell types.
Consequently, the purchasing demand for 182mm P-type wafers is expected to decrease. Although wafer prices are holding steady this week, considering the divergent operational rates among downstream cell manufacturers, a future divergence in prices between N-type and P-type wafers is anticipated.
Moreover, attention should be directed towards whether the demand and supply relationship can sustain stable prices after the higher wafer activation rates lead to an increase in wafer output during the same period.
Cell prices have maintained stable this week. The mainstream concluded price for M10 cell is RMB 0.46/W, while G12 cell is priced at RMB 0.56/W. The price of M10 mono TOPCon cell is RMB 0.49/W.
On the supply side, cell inventory can currently sustain for about six to seven days, but the pressure on inventory is mounting as downstream demand gradually declines. We’re currently in the midst of the technology iteration phase for N-type and P-type cells.
The production capacity of 182mm P-type cells has significantly dropped, leading to a decline in its OEM fees to 1.0-1.2 yuan. Given the current cell price and the manufacturing cost, the production line for 182mm P-type cells is operating at a loss, while the 210mm P-type cells are still profitable, thanks to orders this month.
However, as order deliveries conclude, the tense supply and demand dynamics are expected to ease. On the demand side, downstream module prices continue to slide, prompting module manufacturers to push for a reduction in cell prices. Additionally, customer demand is sluggish, and buyers are adopting a more cautious approach to future purchases.
This week, cell prices remain relatively stable, but production of 182mm P-type cells has been significantly reduced due to sustained losses, leading to a simultaneous decline in demand and supply. Nevertheless, there is still support from order deliveries for 210mm P-type cells.
In conclusion, with module prices consistently decreasing, we anticipate that cell prices will face increasing pressure in the coming weeks.
Module prices have gone down throughout the week. The mainstream concluded price for 182mm facial mono PERC module is RMB 1.03/W, 210mm facial mono PERC module is priced at RMB 1.04/W, 182mm bifacial glass PERC module at RMB 1.04/W, and 210mm bifacial glass PERC module at RMB 1.05/W.
On the supply side, prices quoted by leading manufacturers to their dealers have plummeted to less than 1 yuan/W, and bidding prices for recent projects are hitting unprecedented lows. The competition among module manufacturers has reached a fever pitch, driving prices in the sector to their rock bottom.
As the N-type and P-type technology undergo iteration, production capacity is slated to be officially cleared at its current low price. Shifting to the demand side, October saw a month-on-month decrease in new PV installations, indicating a clear decline in installation demand, according to statistics from the NEA.
Although distributed PV installed capacity remains robust, it cannot sustain a significant increase, and centralized ground installations are entering their off-season. Additionally, there’s no indication of a rebound in overseas demand, making it challenging for customer demand for module purchases to turn positive.
As the year draws to a close and earinings reports will be reported, manufacturers are grappling with the pressure to meet annual goals, intensifying the need to clear inventory. However, they find themselves in a precarious position in negotiations with customers, compelling them to further reduce prices to facilitate more shipments.
In summary, module prices are experiencing a decline this week and are anticipated to further decrease in the near future.