According to a report from Commercial Times, after suffering a multi-billion-dollar loss in its foundry business, Intel has recruited Naga Chandrasekaran, a veteran responsible for process technology development at Micron, as its Chief Operating Officer.

Intel is reportedly facing setbacks in developing chip manufacturing. After experiencing a staggering USD 7 billion loss in its foundry business in 2023, the company incurred an additional USD 2.5 billion loss in the first quarter of this year.

Thus,to drive the growth of its foundry business, Intel has recruited Naga Chandrasekaran from Micron, who will oversee all of Intel’s manufacturing operations and report directly to CEO Pat Gelsinger.

Chandrasekaran’s appointment will take effect on August 12. He will oversee Intel Foundry’s global manufacturing operations and strategic planning, including assembly and test manufacturing, wafer fabrication, and supply chain management. Essentially, Chandrasekaran will be responsible for all of Intel’s manufacturing activities.

In the announcement of the employment, Intel CEO Pat Gelsinger noted, “Naga is a highly accomplished executive whose deep semiconductor manufacturing and technology development expertise will be a tremendous addition to our team.”

“As we continue to build a globally resilient semiconductor supply chain and create the world’s first systems foundry for the AI era, Naga’s leadership will help us to accelerate our progress and capitalize on the significant long-term growth opportunities ahead,”  Gelsinger said.

As per a report from tom’s hardware, Chandrasekaran has spent over 20 years at Micron, holding various management positions. Most recently, he led global technology development and engineering focused on scaling memory devices, advanced packaging, and emerging technology solutions. His extensive background encompasses process and equipment development, device technology, and mask technology.

He will replace Keyvan Esfarjani, who is set to retire at the end of the year. Esfarjani, who has served at Intel for nearly 30 years, will remain with the company to assist with the transition. He has made significant contributions to Intel’s global supply chain resilience and manufacturing operations.

On the other hand, in an attempt to narrow down the gap with TSMC, Intel is also said to be recruiting the foundry giant’s senior engineers for its foundry division, according to a report by Commercial Times.

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(Photo credit: Intel)

Amid ongoing rumors about Huawei potentially establishing its own wafer fab, the company has remained relatively discreet, especially in light of the U.S. restrictions on the exportation of semiconductor technologies to China. However, recent developments suggest that there may be some truth to these rumors. According to a patent announcement from the China National Intellectual Property Administration (CNIPA), Huawei has applied for a patent related to wafer processing.

According to a report from Chinese media outlet JRJ on December 12th, Huawei Technologies Co., Ltd. has filed a patent application titled “Wafer Processing Device and Wafer Processing Method” under the public number CN117219552A with the CNIPA. The application date is listed as June 2022.

The patent abstract shows the embodiments disclosure related to devices and methods for wafer processing. The wafer processing device comprises a wafer stage rotated along a rotation axis, a mechanical arm with a robotic hand for handling wafers and placing them on the wafer stage, a controller, and a calibration component. The calibration component includes a grating plate, fixed relative to the wafer stage; a light source, fixed relative to the grating plate; and an imaging element, fixedly provided on the mechanical arm, and adapted to receive light emitted from the light source and transmitted through the grating plate; wherein , the controller is configured to control the mechanical arm or the adjustment device on the mechanical arm to adjust the position of the wafer based on the detection of the received light by the imaging element;wherein, when the wafer stage carries the wafer, the grating plate and the imaging element are respectively located on opposite sides of the table where the upper surface of the wafer stage is located, and the upper surface is used to carry the wafer. The devices and methods provided by embodiments of the present disclosure can improve wafer alignment efficiency and alignment accuracy.

Earlier reports have suggested that Huawei is involved in the construction of wafer fabs in China. According to a news report from Bloomberg, Huawei is actively contributing to the expansion of at least three wafer fabs in the country. In its pursuit of building a self-sustaining semiconductor network, Huawei has acquired manufacturing facilities from Jinhua Integrated Circuit (JHICC) and Qingdao Aristocrat (Suppoly). Additionally, the company has assisted in the establishment of production facilities operated by Pengxinwei (PXW) and Shenzhen Pengsheng Technology (PST). It is worth noting that JHICC and PXW face challenges in selling their products to multinational corporations and encounter difficulties in procuring advanced wafer manufacturing equipment due to being blacklisted by the U.S. government.

(Image: Huawei)

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Recent reports from the IC design industry suggest that TSMC, the leading semiconductor foundry, is contemplating a slight price concession for certain mature processes next year, marking a return after three years. Despite its reputation for firm pricing, TSMC’s willingness to make concessions is seen as a response to a decrease in capacity utilization. According to UDN News, this shift may indicate the broader trend of semiconductor foundries facing pricing pressures due to lower capacity utilization.

Known for its stable pricing with minimal fluctuations, TSMC typically offers single-digit percentage annual concessions to clients. The reported concession for specific mature processes is estimated to be around 2%. TSMC, however, declined to comment on these pricing adjustments.

Several IC design companies have confirmed ongoing negotiations with TSMC regarding price concessions for the upcoming year. One disclosed that TSMC’s concession method involves settling after the completion of a full quarter’s production, offsetting the next quarter’s mask costs. This approach allows for low single-digit percentage concessions in the following quarters.

Industry sources suggest that other semiconductor foundries have already taken significant measures, such as direct price reductions on large orders and providing additional free wafer allocations, aiming to boost capacity utilization. Chinese chipmakers initiated price reductions earlier and more aggressively than their Taiwanese counterparts, maintaining TSMC’s relatively firm pricing.

The news of TSMC considering concessions for certain mature processes, while not a direct price reduction, holds indicative significance. It is likely to exert pricing pressure on other industry players with mature processes before the peak season arrives in the latter half of next year.

During the semiconductor shortage in recent years, TSMC initially refrained from raising prices. As a result, its pricing remained relatively lower, even the lowest, compared to other industry players who significantly increased their prices. TSMC reportedly canceled concessions in 2021 and 2022 and initiated a rare price increase at the beginning of 2023, rumored to be in the range of 3% to 6%.

However, with the semiconductor market reversing, the supply chain has been gradually adjusting inventory since the second half of 2022. In the first half of this year, TSMC reportedly introduced an “increase quantity feedback plan,” offering additional mature process wafer allocations for orders reaching a certain quantity.

Although TSMC relies on advanced processes for over 50% of its revenue, with mature processes not being its primary focus, they remain a market consideration.

(Image: TSMC)

Amid a two-year recalibration in the smartphone and electronic component supply chain, inventory levels have rebounded to a healthy state. The infusion of new applications like AI and auto driving has fueled a comprehensive replenishment of consumer electronics inventory, propelling IC design with a surge in urgent and short orders.

Although wafer prices surged by over 40% during the pandemic, recent declines in utilization suggest an impending price reduction cycle to maintain operational rates, expected to lead to a reduction in IC design costs. Key players, boasting inventory turnover periods below a hundred days, are well-positioned for a potential upswing in demand, as reported by CTEE.

While most semiconductor companies are anticipated to experience declines in 2023, inventory levels have already tapered off. MediaTek boasts an inventory turnover period of just 89.11 days, with Realtek and ITE Tech at 96.77 and 84.11 days, respectively.

IC design companies emphasize the dominance of rush orders in the latter half of the year. Despite the uncertainty of economic visibility, confidence prevails regarding the new applications like AI, auto driving, and LEO(Low Earth Orbit) satellites, promising an upsurge in demand.

IC design companies also point out that the 3-5 year cycle of device replacement is imminent. The infusion of new AI applications and technological advancements in decision-making and workplace practices is expected to drive business demand. Positive developments, such as Microsoft discontinuing support for Windows 10, are anticipated to gain traction by 2024.

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Despite the U.S. sanction on the semiconductor industry in China, China is still positively looking for further development.

Following our discussion on the shifts of Chinese wafer fabs in the previous article (China’s Wafer Fabs Hits 44 with Future Expansion 32, Mainly Targeting on The Mature Process), this article focuses on the application of 8-inch and 12-inch wafers, as well as provides detailed account of Chinese foundries’ strategic positioning in the landscape.

From a cost perspective, producing a 12-inch wafer incurs approximately 50% more cost than an 8-inch wafer. However, the chip output from a 12-inch wafer is nearly triple that of an 8-inch wafer, leading to a cost reduction of roughly 30% per chip. As manufacturing processes improve and yields increase, the cost of 12-inch wafers is expected to further decline in the future.

In terms of applications, a clear distinction emerges between 12-inch and 8-inch wafers. The versatility of 12-inch wafers is evident, covering a broad range of practical applications. As depicted in the table below, 8-inch wafers are primarily utilized for mature and specialized processes, focusing on the 0.13-90nm range.

8-inch wafers’ downstream applications are concentrated in industrial, mobile, and automotive sectors, encompassing power devices, power management chips, non-volatile memory, MEMS, display driver ICs, and fingerprint recognition chips, among others. The surging demand for power devices in automotive electronics and industrial applications has been a key driver for recent production expansions.

Currently, the market demand for 8-inch wafers remains robust. However, there is a trend of decreasing 8-inch production lines in the market. This shift is primarily due to the industry’s mainstream adoption of 12-inch wafers. Given the significant capital required to establish 12-inch wafer fabs (often exceeding billions of US dollars), many foundries are reevaluating their 8-inch wafer production lines. These lines face challenges such as outdated equipment (mostly sourced from the second-hand market), upgrades difficulties, and lower returns compared to 12-inch wafers. Consequently, an increasing number of major companies are transitioning their focus from 8-inch to 12-inch wafers.

While the quantity of 8-inch wafer fabs is far less than that of 12-inch wafer fabs, their presence is significant. According to data from SEMI, China has maintained rapid development in 8-inch wafers. It is projected that by 2026, China’s market share in 8-inch wafers will increase to 22%, with a monthly production capacity reaching 1.7 million wafers, ranking first globally. By the end of 2025, companies including Huahong, Sien, Silan, Yangdong Microelectronic, GTA Semiconductor, SMEIIC, Zkjx, Hwdz, and Eaerkey are expected to establish a total of nine new 8-inch wafer fabs.

China’s Semiconductor Focus: 33% Mature Process Capacity by 2027

Based on product requirements, we can categorize semiconductor processes into specialty processes and logic processes. Logic processes further divide into mature processes (28nm and above) and advanced processes (nodes below 28nm, primarily 16/14nm and below).

Considering the current scenario, challenges in advanced process technology and high expenditures have confined major players in advanced processes to Intel, TSMC, and Samsung. This year, Samsung and TSMC announced the mass production of 3nm processes, marking the most advanced nodes currently available. Examining China’s situation, the semiconductor industry, having started relatively late, is currently focusing on mature and specialty processes due to factors like equipment and material limitations and changes in the international landscape.

It’s worth noting that, apart from Chinese wafer fabs intensively researching mature processes, many major companies have started to reverse their focus on mature processes in the past two years. Companies such as TSMC, Samsung, Intel, UMC, and GlobalFoundries are actively expanding their mature process capacities.

Among them, UMC’s bet on mature capacities is unprecedented. It became the world’s first wafer foundry to announce leaving research and development of advanced processes. Since 2018, UMC has strategically focused on improving the company’s return on investment, particularly targeting processes of 28nm and above.

According to TrendForce, the compound annual growth rate of global semiconductor foundry capacities from 2021 to 2024 is expected to reach 11%. 28nm capacity is expected to be 1.3 times that of 2022 by 2024, making it the most actively expanded node in mature processes. It is anticipated that more applications of specialty processes will transition to 28nm. Moreover, from 2021 to 2024, the global capacity of mature processes (28nm and above) is expected to maintain a stable share of over 75%. This indicates the potential and significance of positioning in the mature process and specialty process markets.

TrendForce predicts that, with the expansion of mature process capacities below 28nm, mature process capacities are expected to account for 70% of the top ten foundries’ capacities by 2027. China is expected to hold 33% of mature process capacities in 2027, with the possibility of continuous upward adjustments.

(Image: SMIC)