TSMC has achieved a breakthrough in next-generation MRAM memory-related technology, collaborating with the Industrial Technology Research Institute (ITRI) to develop a spin-orbit-torque magnetic random-access memory (SOT-MRAM) array chip

This SOT-MRAM array chip showcases an innovative computing in memory architecture and boasts a power consumption of merely one percent of a spin-transfer torque magnetic random-access memory (STT-MRAM) product.

According to a report by the Economic Daily News, industry sources suggest that with the advent of the AI and 5G era, applications such as autonomous driving, precise medical diagnostics, and satellite image recognition require a new generation of memory that is faster, more stable, and has lower power consumption. MRAM, which utilizes common refined magnetic materials found in hard drives, meets the demands of this new generation of memory, attracting major players like Samsung, Intel, and TSMC to invest in research and development.

In the past, MRAM was mainly applied in automotive and base station. However, due to the characteristics of MRAM architecture, it was challenging to achieve a balance between data retention, write endurance, and write speed. A few years ago, a new architecture called Spin-Transfer Torque MRAM (STT-MRAM) emerged, addressing the aforementioned challenges and entering commercialization.

TSMC has successfully developed related MRAM product lines with 22-nanometer, 16/12-nanometer processes and secured orders in markets such as memory and automotive, seizing the MRAM business opportunity.

In a recent development, TSMC, riding on its success, collaborates with the Industrial Technology Research Institute (ITRI) to create an SOT-MRAM array chip, complemented by an innovative computing architecture.

Their collaborative efforts have resulted in a research paper on this microelectronic component, which was jointly presented at the 2023 IEEE International Electron Devices Meeting (IEDM 2023), underscoring the cutting-edge nature of their findings and their pivotal role in advancing next-generation memory technologies.

Dr. Shih-Chieh Chang, General Director of Electronic and Optoelectronic System Research Laboratories at ITRI, highlighted the collaborative achievements of both organizations.

“Following the co-authored papers presented at the Symposium on VLSI Technology and Circuits last year, we have further co-developed a SOT-MRAM unit cell,” said Chang. “This unit cell achieves simultaneous low power consumption and high-speed operation, reaching speeds as rapid as 10 nanoseconds. And its overall computing performance can be further enhanced when integrated with computing in memory circuit design. Looking ahead, this technology holds the potential for applications in high-performance computing (HPC), artificial intelligence (AI), automotive chips, and more.”

(Image: ITRI)

China, Taiwan, and South Korea’s foundry price war continues to heat up. Rumors of price reductions are circulating in the foundry industry, Chinese foundries allegedly lowering their tape out prices, attracting Taiwanese IC design companies to switch their orders.

Companies including Samsung, GlobalFoundries, UMC, and PSMC have reportedly seen customers cancel orders in favor of these Chinese foundries.

According to reports from IJIWEI, China’s SMIC, Huahong Group, and Nexchip began lowering their foundry service prices to Taiwanese IC design companies last year to secure new orders. Many Taiwanese IC design companies have been enticed by these lower prices, prompting them to shift their orders to Chinese foundries. As a result, companies like Samsung, GlobalFoundries, UMC, and PSMC have witnessed customers canceling orders in favor of Chinese manufacturers.

Due to the mature manufacturing processes in China, unaffected by US export restrictions, the lowered wafer fabrication costs have become attractive to Taiwanese IC design companies seeking to enhance their cost competitiveness.

Reports also indicate that this competitive pressure has forced Taiwan’s foundries, UMC and PSMC, to follow suit by reducing their prices. UMC has lowered its 12-inch wafer foundry services by an average of 10-15%, while its 8-inch wafer services have seen an average price reduction of 20%. These price adjustments took effect in the fourth quarter of 2023.

Earlier reports from TechNews had already highlighted that, due to the sluggish semiconductor market conditions in 2023, both China and South Korea aggressively reduced prices to secure orders, with price reductions of up to 20-30% observed in 8-inch and 12-inch mature processes. Taiwanese foundries also made concessions in terms of pricing.

Taiwan’s leading foundry, TSMC, had already initiated pricing concessions in 2023, mainly related to mask costs rather than wafer fabrication. It was reported that these concessions primarily applied to the 7nm process and were dependent on order volumes.

Samsung Foundry, which had previously remained inactive, also adopted a price reduction strategy in the first quarter of this year, offering discounts ranging from 5-15% and indicating a willingness to negotiate.

Looking at the global semiconductor foundry landscape, data released by TrendForce in 2023 showed that Taiwan accounted for approximately 46% of the world’s wafer fabrication capacity, followed by China at 26%, South Korea at 12%, the United States at 6%, and Japan at 2%. However, due to active efforts by China, the United States, and other countries to increase their local capacity shares, by 2027, Taiwan and South Korea’s capacity shares are expected to converge to approximately 41% and 10%, respectively.

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• [News] Competing with TSMC? Samsung Foundry Follows Price Cuts, Offering Discounts Up to 15%

The global foundry advanced process battle is reigniting, as reported by the Commercial Times. TSMC’s 2-nanometer process at the Baoshan P1 wafer fab in Hsinchu is set to commence equipment installation as early as April, incorporating a new Gate-All-Around (GAA) transistor architecture and aiming for mass production in 2025.

Additionally, expansion plans for Baoshan P2 and the Kaohsiung fab are projected to join in 2025, with evaluations underway for Phase 2 in the Central Taiwan Science Park. The competition with Samsung and Intel in the most advanced process is intensifying.

Semiconductor industry sources note the ongoing progress in global foundry advanced processes, with Samsung entering GAA architecture early at 3 nanometers, though facing yield challenges, while Intel anticipates mass production of its RibbonFET architecture at 20A this year.

In response to fierce competition, TSMC must accelerate its pace. The ‘Gate-All-Around’ (GAA) technology is a critical factor determining whether chip processing power will double within 1.5 to 2 years.

As per the report, Samsung’s attempt to lead in the 3-nanometer chip segment, transitioning from traditional FinFET, has faced stability issues in yield, hampering customer adoption, and giving TSMC confidence in its 3-nanometer progress. This also highlights the increased complexity in transitioning from 2D to 3D chip designs with GAA transistor architecture.

Furthermore, Intel is intensifying its efforts to catch up, planning to launch Intel 20A in the first half of the year and Intel 18A in the second half. However, it is speculated that Intel 20A will be exclusively used for Intel’s own products, maintaining a close collaboration with TSMC.

TSMC, adopting a cautious approach, benefits from a more advantageous cost structure by minimizing changes in production tools within the same process technology and manufacturing flow. For customers, altering designs during advanced process development incurs significant time and economic costs.

Supply chain sources reveal that TSMC finalized various parameters for its 2-nanometer process at the end of last year, confirming specialty gases and equipment. Contracts are gradually being signed, with equipment installation at the Baoshan P1 fab scheduled to commence in April. Equipment industry sources suggest that TSMC’s process advancement is progressing rapidly as expected, speculating that there will be updates on the Baoshan P2 fab later this year.

(Image: TSMC)

According to a report by TechNews, Taiwan has introduced its largest-ever investment deduction incentives under the “Statute for Industrial Innovation,” often referred to as the “Taiwanese Chip Act.” Articles 10-2 and 72 of the statute came into effect, and the Ministry of Economic Affairs announced that it would accept company applications from February 1 to May 31 this year.

The Ministry of Economic Affairs stated that applications for deductions would be accepted starting February this year. The provided tax incentives include a 25% deduction for research and development expenses and a 5% deduction for expenditures on acquiring new eqipment for advanced processes, all of which can be deducted from the current year’s corporate income tax.

Eligibility criteria include companies with research and development expenses of at least NT$6 billion, a research and development density of 6%, and expenditures of NT$10 billion for the purchase of equipment for advanced processes, with no restrictions on industry category.

The Ministry of Economic Affairs emphasized that as the parent law already specifies an effective tax rate of 12% for the fiscal year 112 and a threshold of 15% from the fiscal year 113 onwards, this measure aims to encourage businesses that do not meet these tax rate qualifications to strive for them and become eligible for tax incentives.

A review panel will be formed to assess whether applying companies meet the criteria for a critical position in the international supply chain and other qualification requirements.

The Ministry of Economic Affairs shared that the application period for Article 10-2 of the Statute for Industrial Innovation is from February 1 to May 31 this year. Companies are required to provide explanatory documents and supporting evidence, including data on products, international market share, rankings, import-export trade, and other statistics, serving as indicators for the assessment of technological innovation and critical positions.

According to the financial reports of publicly listed companies in 2022, including TSMC, MediaTek, Realtek, Novatek, Delta Electronics, Nanya Technology, Phison and Winbond, their research and development expenses and research and development density all meet the application thresholds.

(Image: TSMC)

According to a report by China’s financial media outlet Yicai, in 2023, China’s import quantity and value of integrated circuits experienced a significant decline, influenced by factors such as the overall downturn in the global chip market and the U.S. ban on the sale of chips to China.

The latest data from the Chinese Customs Administration indicates that in 2023, China imported a total of 479.5 billion integrated circuits, a 10.8% decrease compared to 2022, with an import value of $349.4 billion, marking a 15.4% year-on-year decline.

Industry experts suggest that the soft importation of integrated circuits and semiconductor equipment in China reflects the global economic headwinds in 2023, especially the impact of sluggish sales of Chinese smartphones and laptops. Simultaneously, Chinese companies are striving to increase domestic chip production to reduce dependence on imported chips.

Despite the time required for China to achieve mass production in the field of artificial intelligence chips, the push by the Chinese government to establish a more resilient chip supply chain has motivated local manufacturers to actively increase production capacity in mature nodes. These chips are used in devices such as automobiles and home appliances, unaffected by the current U.S. restrictions.

Public information reveals that SMIC, Hua Hong Group, and Nexchip are among the most active in expanding production, focusing on specialty processes such as driver ICs, CIS/ISP, and power semiconductor ICs.

With China’s significant investment in mature nodes, it is positioned at a time when the global chip industry is poised for recovery. According to a recent TrendForce’s data, China currently has 44 operational semiconductor wafer fabs, with an additional 22 under construction. By the end of 2024, 32 Chinese wafer fabs will expand their capacity for 28-nanometer and older mature chips.

TrendForce predicts that by 2027, China’s share of mature process capacity in the global market will increase from 31% in 2023 to 39%, with further growth potential if equipment procurement progresses smoothly.

(Image: SMIC)