As per Chinese media mydrivers’ report, it has indicated that NVIDIA updated the EULA terms in the CUDA 11.6 installer, explicitly prohibiting third-party GPU companies from seamlessly integrating CUDA software. This move has reportedly stirred up discussions among the market.

NVIDIA updated the EULA agreement for CUDA 11.6, explicitly stating, “You may not reverse engineer, decompile or disassemble any portion of the output generated using SDK elements for the purpose of translating such output artifacts to target a non-NVIDIA platform.”

This move is reportedly speculated to target third-party projects like ZLUDA, involving Intel and AMD, as well as compatibility solutions from Chinese firms like Denglin Technology and MetaX Technology.

In response, MooreThreads issued an official statement, confirming that its MUSA and MUSIFY technologies remain unaffected. MUSA and MUSIFY are not subject to NVIDIA EULA terms, ensuring developers can use them with confidence.

In fact, since 2021, NVIDIA has prohibited other hardware platforms from running CUDA software analog layers but only warned about it in the online EULA user agreement. Currently, NVIDIA has not explicitly named any parties, issuing warnings in the agreement without taking further action, although further measures cannot be ruled out in the future.

In the past, CUDA development and its ecosystem were widely regarded as NVIDIA’s moat. However, processor architect Jim Keller previously criticized CUDA on the X platform, stating, “CUDA is a swamp, not a moat,” adding, “CUDA is not beautiful. It was built by piling on one thing at a time.”

Meanwhile, according to the account rgznai100 posting on Chinese blog CSDN, NVIDIA’s actions will have a significant impact on AI chip/GPGPU companies that previously adopted CUDA-compatible solutions. NVIDIA may initially resort to legal measures, such as lawsuits, against GPGPU companies following similar paths.

Therefore, Chinese enterprises should endeavor to enhance collaboration with the open-source community to establish an open AI compilation ecosystem, reducing the risks posed by NVIDIA’s market dominance.

Read more

• [News] HBM Manufacturers Encounter Challenges in NVIDIA Quality Tests, Raising Concerns over Yield and Production
• [News] NVIDIA Reportedly Overwhelms TSMC with 3 and 4-Nanometer Orders

(Photo credit: NVIDIA)

As per the report from Bloomberg, the US government is set to invest USD 3.5 billion in Intel to enhance the production capacity of advanced chips for military and intelligence purposes. Reportedly, the move is potentially positioning Intel as a leading semiconductor provider in the defense market.

Under the US government’s RAMP-C initiative, numerous companies, including IBM, Microsoft, and NVIDIA, are developing chips for the US military. Stu Pann, Intel’s head of foundry, recently stated in an interview with Tom’s Hardware that the company has signed a USD 1 billion contract with the US government and the Department of Defense.

According to the same report from Tom’s Hardware, this funding could be part of the total appropriation of USD 39 billion under the CHIPS and Science Act or may stem from the proposed Secure Enclave program specifically designed for military and intelligence chips. In any case, it will strengthen Intel’s position as a leading manufacturer in the defense market.

As the new funding announcement emerges, the U.S. Department of Commerce is also poised to invest billions of dollars in leading chip manufacturers like Intel, Micron, Samsung, and others, aiming to enhance local semiconductor manufacturing capabilities.

The U.S. government enacted the “Chip Act” in 2022. For now, only three American companies currently benefiting from the subsidies, including BAE Systems, GlobalFoundries, and Microchip Technology.

Read more

• [News] Announcement on Additional Subsidies for Chip Act Expected This Week; Intel Could Receive Billions

(Photo credit: Intel)

Earlier rumors have suggested that the Huawei P70 series smartphones would be unveiled in March. However, according to sources cited by IJIWEI, the P70 series is expected to be delayed until April. It is anticipated to include three models: the P70, P70 Pro, and P70 Art.

Based on information from Weibo and X-platform sources cited in IJIWEI’s report, the Huawei P70 series is expected to feature high-density lithium batteries, wireless charging, and satellite communication technology across all models. In terms of imaging, the series is expected to be equipped with periscope telephoto lenses and a 50MP main camera. The main camera’s CIS is expected to be either the Sony IMX989 or OV50H. The display is expected to have a 1.5K resolution and support LTPO technology.

The Huawei P series smartphones are known for their imaging capabilities. Leaks cited by the report suggest that the P70 will feature a 2.5D curved screen and BeiDou Navigation Satellite System. The model, expected to be the P70 Art, is rumored to adopt the IMX989 one-inch main camera sensor with support for a physically variable aperture.

The P70 Art will also include a 50-megapixel ultra-wide-angle camera and an upgraded 4X periscope telephoto module, as per the report. Additionally, the dual-directional satellite communication technology of this phone is expected to see upgrades.

Regarding the processors of the Huawei P70 series, reports suggest that they will adopt the same model as the Mate 60 series, although the flagship variant of the P70 may have a different processor frequency compared to the standard version.

The Huawei P70 series is expected to bring many highlights in terms of configuration, design, imaging performance, and more. However, specific details such as the release date and parameter information will require further confirmation from Huawei officials.

Previously, analyst Ming-Chi Kuo from Tianfeng International Securities indicated in a report that Huawei is expected to launch a new flagship series, the P70, in the first half of 2024. Benefiting from upgraded camera specifications and the adoption of the in-house designed Kirin chip, the shipment volume of the models under Huawei’s P70 series is expected to see significant growth in 2024 compared to the 4–5 million units of the models under the P60 series in 2023.

Read more

• [News] Huawei, Honor, and Transsion Reportedly Estimate Active Smartphone Shipment Goals in 2024, Projecting an Additional 70-80 Million Units

(Photo credit: Huawei)

As Samsung’s foundry business closely trails TSMC, Economic Daily News has reported that Samsung is poised to secure orders for Meta’s next-gen AI chips, manufactured on a 2-nanometer process. If so, this may mark Samsung’s first 2nm customer, intensifying the rivalry with TSMC in the 2nm race.

According to The Korea Times, the potential collaboration between Meta and Samsung was discussed during Meta CEO Zuckerberg’s recent visit to South Korea.

The report cites anonymous officials stating that during Zuckerberg’s meeting with South Korean President Yoon Suk Yeol, he disclosed Meta’s reliance on TSMC. However, the current situation is described as “volatile” due to TSMC’s tight production capacity, which could potentially affect Meta’s supply in the long run.

Nevertheless, neither Meta nor South Korean officials have confirmed these rumors.

Currently, Meta has entrusted TSMC with the production of two AI chips. As per the Economic Daily News citing sources, the biggest challenge for Samsung’s foundry business lies in yield rates.

Previously, poor yield rates prompted Apple, Qualcomm, and Google to switch their orders to TSMC. If Meta indeed turns to Samsung for the next-generation AI chips, the key to the success of their collaboration still lies in yield rates.

As per Samsung’s previous roadmap, the 2-nanometer SF2 process is set to debut in 2025. Compared to the second-generation 3GAP process at 3 nanometers, it offers a 25% improvement in power efficiency at the same frequency and complexity, as well as a 12% performance boost at the same power consumption and complexity, while reducing chip area by 5%.

As stated in Samsung’s Foundry Forum (SFF) plan, Samsung will begin mass production of the 2nm process (SF2) in 2025 for mobile applications, expand to high-performance computing (HPC) applications in 2026, and further extend to the automotive sector and the expected 1.4nm process by 2027.

Read more

• [News] Samsung Secures 2-Nanometer Order from Japanese AI Startup Preferred Networks
• [News] Samsung’s Discount Strategy Challenges TSMC as the Battle for 2nm Orders Heats Up

(Photo credit: Samsung)

South Korean memory giant SK Hynix is significantly investing in advanced chip packaging, aiming to capture more demand for High Bandwidth Memory (HBM), a vital component driving the burgeoning AI market.

According to Bloomberg’s report, Lee Kang-Wook, currently leading SK Hynix’s packaging research and development, stated that the company is investing over USD 1 billion in South Korea to expand and enhance the final steps of its chip manufacturing process.

“The first 50 years of the semiconductor industry has been about the front-end, or the design and fabrication of the chips themselves,” Lee Kang-Wook expressed in an interview with Bloomberg. “But the next 50 years is going to be all about the back-end, or packaging.”

The same report further indicates that the packaging upgrade will help reduce power consumption, enhance performance, and maintain SK Hynix’s leadership position in the HBM market.

Recent market trends also highlight the crucial role of advanced packaging in the manufacturing of HBM products. According to a recent report by South Korean media DealSite, the complex architecture of HBM has resulted in difficulties for manufacturers like Micron and SK Hynix to meet NVIDIA’s testing standards.

The yield of HBM is closely tied to the complexity of its stacking architecture, which involves multiple memory layers and Through-Silicon Via (TSV) technology for inter-layer connections. These intricate techniques increase the probability of process defects, potentially leading to lower yields compared to simpler memory designs.

The reason lies in the lower yield of HBM chips compared to traditional memory chips. The complex stacking architecture of HBM involves multiple memory layers and Through-Silicon Via (TSV) technology for interconnecting layers, which increases manufacturing complexity. In the multi-layer stacking of HBM, if any of the HBM chips are defective, the entire stack will be discarded.

HBM, a type of DRAM primarily used in AI servers, is experiencing a surge in demand worldwide, led by NVIDIA. Moreover, according to a previous TrendForce press release, the three major original HBM manufacturers held market shares as follows in 2023: SK Hynix and Samsung were both around 46-49%, while Micron stood at roughly 4-6%.

Read more

• [News] HBM Manufacturers Encounter Challenges in NVIDIA Quality Tests, Raising Concerns over Yield and Production
• [News] SK Hynix Rumored to Propose Collaboration with Kioxia for HBM Production in Japan

(Photo credit: SK Hynix)