TSMC has achieved a breakthrough in next-generation MRAM memory-related technology, collaborating with the Industrial Technology Research Institute (ITRI) to develop a spin-orbit-torque magnetic random-access memory (SOT-MRAM) array chip

This SOT-MRAM array chip showcases an innovative computing in memory architecture and boasts a power consumption of merely one percent of a spin-transfer torque magnetic random-access memory (STT-MRAM) product.

According to a report by the Economic Daily News, industry sources suggest that with the advent of the AI and 5G era, applications such as autonomous driving, precise medical diagnostics, and satellite image recognition require a new generation of memory that is faster, more stable, and has lower power consumption. MRAM, which utilizes common refined magnetic materials found in hard drives, meets the demands of this new generation of memory, attracting major players like Samsung, Intel, and TSMC to invest in research and development.

In the past, MRAM was mainly applied in automotive and base station. However, due to the characteristics of MRAM architecture, it was challenging to achieve a balance between data retention, write endurance, and write speed. A few years ago, a new architecture called Spin-Transfer Torque MRAM (STT-MRAM) emerged, addressing the aforementioned challenges and entering commercialization.

TSMC has successfully developed related MRAM product lines with 22-nanometer, 16/12-nanometer processes and secured orders in markets such as memory and automotive, seizing the MRAM business opportunity.

In a recent development, TSMC, riding on its success, collaborates with the Industrial Technology Research Institute (ITRI) to create an SOT-MRAM array chip, complemented by an innovative computing architecture.

Their collaborative efforts have resulted in a research paper on this microelectronic component, which was jointly presented at the 2023 IEEE International Electron Devices Meeting (IEDM 2023), underscoring the cutting-edge nature of their findings and their pivotal role in advancing next-generation memory technologies.

Dr. Shih-Chieh Chang, General Director of Electronic and Optoelectronic System Research Laboratories at ITRI, highlighted the collaborative achievements of both organizations.

“Following the co-authored papers presented at the Symposium on VLSI Technology and Circuits last year, we have further co-developed a SOT-MRAM unit cell,” said Chang. “This unit cell achieves simultaneous low power consumption and high-speed operation, reaching speeds as rapid as 10 nanoseconds. And its overall computing performance can be further enhanced when integrated with computing in memory circuit design. Looking ahead, this technology holds the potential for applications in high-performance computing (HPC), artificial intelligence (AI), automotive chips, and more.”

(Image: ITRI)

China, Taiwan, and South Korea’s foundry price war continues to heat up. Rumors of price reductions are circulating in the foundry industry, Chinese foundries allegedly lowering their tape out prices, attracting Taiwanese IC design companies to switch their orders.

Companies including Samsung, GlobalFoundries, UMC, and PSMC have reportedly seen customers cancel orders in favor of these Chinese foundries.

According to reports from IJIWEI, China’s SMIC, Huahong Group, and Nexchip began lowering their foundry service prices to Taiwanese IC design companies last year to secure new orders. Many Taiwanese IC design companies have been enticed by these lower prices, prompting them to shift their orders to Chinese foundries. As a result, companies like Samsung, GlobalFoundries, UMC, and PSMC have witnessed customers canceling orders in favor of Chinese manufacturers.

Due to the mature manufacturing processes in China, unaffected by US export restrictions, the lowered wafer fabrication costs have become attractive to Taiwanese IC design companies seeking to enhance their cost competitiveness.

Reports also indicate that this competitive pressure has forced Taiwan’s foundries, UMC and PSMC, to follow suit by reducing their prices. UMC has lowered its 12-inch wafer foundry services by an average of 10-15%, while its 8-inch wafer services have seen an average price reduction of 20%. These price adjustments took effect in the fourth quarter of 2023.

Earlier reports from TechNews had already highlighted that, due to the sluggish semiconductor market conditions in 2023, both China and South Korea aggressively reduced prices to secure orders, with price reductions of up to 20-30% observed in 8-inch and 12-inch mature processes. Taiwanese foundries also made concessions in terms of pricing.

Taiwan’s leading foundry, TSMC, had already initiated pricing concessions in 2023, mainly related to mask costs rather than wafer fabrication. It was reported that these concessions primarily applied to the 7nm process and were dependent on order volumes.

Samsung Foundry, which had previously remained inactive, also adopted a price reduction strategy in the first quarter of this year, offering discounts ranging from 5-15% and indicating a willingness to negotiate.

Looking at the global semiconductor foundry landscape, data released by TrendForce in 2023 showed that Taiwan accounted for approximately 46% of the world’s wafer fabrication capacity, followed by China at 26%, South Korea at 12%, the United States at 6%, and Japan at 2%. However, due to active efforts by China, the United States, and other countries to increase their local capacity shares, by 2027, Taiwan and South Korea’s capacity shares are expected to converge to approximately 41% and 10%, respectively.

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• [News] Competing with TSMC? Samsung Foundry Follows Price Cuts, Offering Discounts Up to 15%

According to the latest memory spot price trends released by TrendForce, the DRAM spot market is experiencing limited upswing due to poor channel demand, while the NAND Flash market is expected to enter a period of price stabilization, with the upswing also anticipated to converge. Details are as follows:

DRAM Spot Market:

In the spot market, Kingston has finally raised prices of DDR4 and DDR5 modules after a year without price hikes. However, Kingston has not raised prices significantly, and related transactions have been rather tepid. Currently, spot prices are converging on contract prices for DRAM modules. Since channel demand is not particularly strong, this round of price hikes is still limited. The average spot price of the mainstream DRAM chips (i.e., DDR4 1Gx8 2666MT/s) rose by 1.20% from US$1.833 last week to US$1.855 this week.

NAND Flash Spot Market:

The spot market, having undergone a significant price increment within a short span of time previously, has returned to its off-season demand after the dissipation of stocking momentum for year-end festivals, where orders for memory cards, USB flash drives, and SSD are lingering amidst sluggishness. The spot market, as projected by TrendForce, will be entering a price consolidation phase, followed by a subsidence in the increase of prices. 512Gb TLC wafer spots have risen by 2.28% this week, arriving at US$3.188.

SK hynix, the South Korean memory giant, has revealed plans to consider increasing production of specific DRAM in the first quarter due to improved market conditions. Concerns arise in the market regarding the potential resurgence of capacity utilization, challenging the consensus among memory manufacturers to reduce production for price enhancement, possibly hindering the upward trajectory of DRAM in the future.

According to a report by the Commercial Times, industry experts believe that major memory manufacturers, including Samsung, SK hynix, and Micron, are upgrading their production capacities to 1-alpha/beta advanced processes to meet the demand for more profitable DDR5 and High Bandwidth Memory (HBM). The outlook for niche DRAM product in the future is expected to remain positive.

SK Hynix CEO Kwak Noh-jung previously stated at the 2024 CES in Las Vegas that the company is considering increasing production of specific DRAM in the first quarter due to improved market conditions. Kwak mentioned that while the worst conditions for NAND Flash should be over, the industry’s recovery is slower. Therefore, any decision to increase production would likely be considered after the mid-year point.

Following this announcement, some industry insiders expressed concerns about the potential increase in memory manufacturers’ DRAM capacity utilization, which could negatively impact the future pricing trend of DRAM.

However, according to the Commercial Times, quoting a key figure in the Taiwanese memory industry revealed that SK Hynix’s planned increase in production primarily focuses on HBM for AI applications, with a slight increase in DDR5, while the production of DDR4 will continue to decrease.

As the three major manufacturers focus on 1-alpha/beta processes, increasing the supply of DDR5 and HBM, the pricing of niche-type DRAM is expected to gradually improve amid capacity constraints. Therefore, the perceived impact of SK Hynix’s increased production of specialized DRAM on the overall future DRAM pricing is not anticipated to be negative.

TrendForce points out that, considering the need for more advanced equipment to produce increased quantities of HBM and DDR5, the production capacity for DDR3 and DDR4 in the first quarter of 2024 is expected to decrease compared to the previous year.

However, due to market considerations and the ongoing shift towards DDR5 for high-end products, the demand for DDR3 and DDR4 is expected to slow down. This distribution of production capacity aligns with market trends and developments.

Tracking back the memory prices, from the fourth quarter of 2022 to the third quarter of 2023, the memory market experienced a downturn, prompting Samsung, SK Hynix, and Micron to collectively reduce production. By the fourth quarter of 2023, DRAM and NAND flash memory prices finally began to rebound, continuing into the first quarter of 2024, with the momentum of price increases continuing to be closely monitored by the market.

(Image: SK hynix)

The global foundry advanced process battle is reigniting, as reported by the Commercial Times. TSMC’s 2-nanometer process at the Baoshan P1 wafer fab in Hsinchu is set to commence equipment installation as early as April, incorporating a new Gate-All-Around (GAA) transistor architecture and aiming for mass production in 2025.

Additionally, expansion plans for Baoshan P2 and the Kaohsiung fab are projected to join in 2025, with evaluations underway for Phase 2 in the Central Taiwan Science Park. The competition with Samsung and Intel in the most advanced process is intensifying.

Semiconductor industry sources note the ongoing progress in global foundry advanced processes, with Samsung entering GAA architecture early at 3 nanometers, though facing yield challenges, while Intel anticipates mass production of its RibbonFET architecture at 20A this year.

In response to fierce competition, TSMC must accelerate its pace. The ‘Gate-All-Around’ (GAA) technology is a critical factor determining whether chip processing power will double within 1.5 to 2 years.

As per the report, Samsung’s attempt to lead in the 3-nanometer chip segment, transitioning from traditional FinFET, has faced stability issues in yield, hampering customer adoption, and giving TSMC confidence in its 3-nanometer progress. This also highlights the increased complexity in transitioning from 2D to 3D chip designs with GAA transistor architecture.

Furthermore, Intel is intensifying its efforts to catch up, planning to launch Intel 20A in the first half of the year and Intel 18A in the second half. However, it is speculated that Intel 20A will be exclusively used for Intel’s own products, maintaining a close collaboration with TSMC.

TSMC, adopting a cautious approach, benefits from a more advantageous cost structure by minimizing changes in production tools within the same process technology and manufacturing flow. For customers, altering designs during advanced process development incurs significant time and economic costs.

Supply chain sources reveal that TSMC finalized various parameters for its 2-nanometer process at the end of last year, confirming specialty gases and equipment. Contracts are gradually being signed, with equipment installation at the Baoshan P1 fab scheduled to commence in April. Equipment industry sources suggest that TSMC’s process advancement is progressing rapidly as expected, speculating that there will be updates on the Baoshan P2 fab later this year.

(Image: TSMC)