Mature process foundries are locked in a battle to uphold a 60% capacity utilization rate. Reports indicate that major players, including UMC, Vanguard International Semiconductor (VIS), and PSMC, are slashing prices significantly for the first quarter of the coming year to salvage their capacity utilization rates. This reduction, reaching double-digit percentages and up to 15% to 20% for project customers, stands out as the most extensive post-pandemic price cut, according to UDN News.

Post-Pandemic Price Challenges in Mature Process Foundries    

This pricing adjustment is pushing the prices of mature process foundries to a new low post-pandemic, affecting the profit margins and profitability trends of related companies. Industry sources disclose that only TSMC’s prices remain robust, with almost no exception for other foundries.

To rescue capacity utilization rates, companies are aggressively tweaking their quotes. A source from an IC design company privately reveals that foundries have notified them of slow-moving business in mature processes, resulting in a direct drop in capacity utilization rates. To ensure capacity utilization rates and market share, maintaining a certain level of production scale becomes imperative, prompting a substantial reduction in quotes.

Industry sources emphasize that despite recent indications of recovery in the PC and smartphone markets, clients remain cautious due to external factors such as inflation, especially given almost a year of inventory clearance. Companies, still on edge, fear slipping back into the challenges of inventory clearance and thus maintain a conservative approach to order placement.

Currently, the recovery in order placement strength is only about 30% to 40% of pre-pandemic levels, compelling wafer foundries to intensify their price cuts to prevent orders from being lost to competitors willing to lower prices, resulting in even lower capacity utilization.

It is evident that consumer IC demand for foundry services is low, and whom focusing on 8-inch mature process are the most affected. It is mainly due to excessive duplicate orders from integrated device manufacturers (IDMs) and IC design companies in the past, leading to inventory clearance for chips such as power management ICs, driver ICs, and microcontrollers (MCUs). Some products have even shifted to 12-inch wafers, keeping the capacity utilization rates of 8-inch foundries at a low level.

Navigate Semiconductor Shifts in TSMC, UMC, VIS, and PSMC

Industry sources note that TSMC is bolstered by advanced processes, enabling them to bundle them with mature processes for sale. Moreover, TSMC’s pricing strategy for mature processes has not surged as dramatically as that of other related companies, making it more acceptable to customers.

As for UMC, the company anticipates a drop in capacity utilization rates from 67% in the last quarter to 60% to 63% in this quarter, reaching a single-season low in recent years. Due to the continuous adjustment of capacity utilization rates, the gross profit margin will drop from 35.9% last quarter to 31% to 33%, reverting to levels seen at the beginning of the pandemic in 2021.

In response to pricing issues, UMC stated that, as mentioned in a recent earnings call, there will indeed be a significant decrease in the 8-inch, but there will be no adjustments for the 12-inch. Supply chain sources reveal that UMC has reportedly offered a 5% concession, aiming to consolidate order momentum with major clients this quarter. Considering the anticipated weak demand in the first quarter of next year and to attract more order placements, UMC plans to expand the price reduction to double-digit percentages.

According to the supply chain, VIS is expected to see a price reduction of up to 5% in the second half of the year. Large-volume clients may even secure a 10% discount, with a further decrease expected in the first quarter of next year, ranging from single to double-digit percentages. The company’s management previously mentioned at a conference call that, in response to intense price competition, short-term flexible adjustments are anticipated.

Similarly impacted by conservative customer order placements, PSMC reported losses in the third quarter, with capacity utilization rates hovering around 60%. It is reported that PSMC is also gearing up to implement price reduction measures to enhance capacity utilization rates.

(Image: VIS)

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Mainland China’s 3D NAND flash memory manufacturer, Yangtze Memory Technologies Co. (YMTC), filed a lawsuit against the U.S. memory chip leader, Micron Technology, on November 9th in the Northern District Court of California. The lawsuit accuses Micron of infringing upon eight of YMTC’s U.S. patents related to 3D NAND technology.

According to ICsmart, the patents involved in this case from YMTC include US10,950,623 (3D NAND memory device and method of forming the same), US11,501,822 (Non-volatile storage device and control method), US10,658,378 (Through-array contact [TAC] for three-dimensional memory devices), and US10,937,806 (Through-array contact [TAC] for three-dimensional memory devices), US10,861,872 (Three-dimensional memory device and method for forming the same), US11,468,957 (Architecture and method for NAND memory operation), US11,600,342 (Method for reading three-dimensional flash memory), and US10,868,031 (Multiple-stack three-dimensional memory device and fabrication method  thereof).

In the complaint, YMTC alleges that Micron’s 128-layer, 176-layer, and other series of 3D NAND technology have violated eight patents owned by YMTC. Micron is accused of using YMTC’s patented technology without authorization to compete with YMTC, protecting market share and impeding YMTC’s interests, thereby inhibiting innovation.

In recent years, with the stacking of 3D NAND technology reaching 128 layers and even higher, the chip area occupied by peripheral CMOS circuits may exceed 50%. To address this issue, YMTC introduced its proprietary innovative Xtacking technology in 2018.

Established in July 2016 and headquartered in Wuhan, Hubei, YMTC is an IDM (Integrated Device Manufacturer) specializing in the design and manufacturing of 3D NAND flash memory. It also provides comprehensive memory solutions.

Under the shadow of the ongoing US-China tech rivalry, Micron Technology adopted a low-key approach at this year’s Import Expo in Shanghai. During a meeting with Micron’s CEO, Sanjay Mehrotra, Chinese Minister of Commerce Wang Wentao on November 1st welcomed Micron’s continued presence and expansion in the Chinese market, emphasizing the importance of adhering to Chinese laws and regulations for sustainable development. Mr. Mehrotra expressed the company’s willingness to further invest in China.

However, on May 21st this year, China’s Cyberspace Administration announced serious cybersecurity issues with Micron’s products sold in China. These products didn’t pass the review, leading Chinese operators to halt the purchase of Micron’s products. This indicates a potential ban on Micron’s products in the Chinese market.

In October 2022, the US imposed exprt restrictions on advanced chip manufacturing equipment, including placing 36 Chinese companies such as YMTC on an entity list.

(Photo credit: iStock)

The demand for TSMC’s CoWoS advanced packaging is skyrocketing. Following NVIDIA’s expansion confirmation in October, there are reports in the industry that major clients like Apple, AMD, Broadcom, Marvell, and others are also placing additional orders with TSMC.

To meet the demands of these five major clients, TSMC is fast-tracking the expansion of CoWoS advanced packaging capacity. Next year, the monthly capacity will increase by about 20% more than the original doubling target, reaching 35,000 wafers, reported by UDN News.

TSMC has not commented on the capacity deployment for CoWoS advanced packaging. Industry sources believe that the substantial orders from TSMC’s major clients indicate a widespread growth in AI applications, driving the demand for chips such as GPU and AI accelerators.

In response to the continuous increase in AI demand, TSMC had previously announced the doubling of CoWoS advanced packaging capacity expansion for next year but did not disclose the monthly production capacity. Industry reports suggest that TSMC’s CoWoS advanced packaging capacity next year will not only double but will also increase by an additional 20% from the original target, resulting in a total monthly capacity of 35,000 wafers.

NVIDIA currently stands as the main large customer for TSMC’s CoWoS advanced packaging, securing almost 60% of TSMC’s related capacity, which is used in its AI chips such as H100 and A100. Additionally, AMD’s latest AI chip products are in the mass production stage, and the upcoming MI300 chip, expected to launch next year, will adopt both SoIC and CoWoS advanced packaging.

At the same time, Xilinx, a subsidiary of AMD, has been a significant customer for TSMC’s CoWoS advanced packaging. With the continuous growth in AI demand, not only Xilinx but also Broadcom has started increasing orders for TSMC’s CoWoS advanced packaging capacity.

(Image: TSMC)

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1. Huawei sticks to a low-key strategy, opting for understated smartphone launches.

Contrary to expectations, the recent Huawei Autumn 2023 Launch Conference took an unexpectedly subdued tone. The much-anticipated Mate 60 Pro, believed to be the star of the show, received only a brief mention, leaving enthusiasts and industry watchers surprised.

This strategic shift can be deciphered by considering Huawei’s established strong brand loyalty among Chinese consumers. Previously hampered by the unavailability of 5G chips due to U.S. trade restrictions, Huawei has managed to overcome these hurdles. The recent successful sales of its new devices in China suggest that a flamboyant presentation of specifications at launch events might not yield substantial benefits. In fact, it could inadvertently be interpreted as a provocation amid the escalating tensions between the U.S. and China.

Therefore, in light of the strained bilateral relations, it is projected that Huawei will continue adopting a discreet approach, with future smartphone releases likely avoiding the spotlight at launch events.

2. Maturation of the smartphone industry poses challenges for brands seeking innovation.

Despite Huawei’s success in developing its own 5G-compatible chips amidst U.S. sanctions, the latest smartphone lack groundbreaking features. Innovations such as satellite communication or advanced camera modules (with periscope lenses and variable apertures) are conspicuously absent. Even in the flagship Mate 60 RS model, the emphasis shifts to the distinctive ceramic material on the back shell.

3. Anticipated rise in China’s domestic production ratio.

Before the U.S. sanctions, Huawei heavily relied on foreign suppliers for smartphone components, including RF, baseband, memory, and sensor chips, complementing its self-developed Kirin chips. However, the restrictive policy have compelled Huawei to shift its dependency to domestic Chinese manufacturers.

In the nearly three-year period from the imposition of U.S. sanctions to the recent release of Huawei’s new 5G smartphone, the industry expected Huawei and its supply chain to suffer severe setbacks. However, the China-made ratio of components in Huawei’s new smartphone currently stands at an impressive 90%, with only the DRAM incorporating SK Hynix products.

With Huawei’s return, it is poised to catalyze growth throughout its supply chain. The ongoing trajectory suggests a continual increase in the domestic production ratio of future devices in China.

As the global semiconductor supply chain based on specialization, the design and development of Application Processors (AP) or System on Chip (SoC) for smartphones primarily fall under the responsibility of IC design houses. In the wake of Apple’s notable success in pioneering in-house chips, other smartphone companies are now emulating this trend.

Developing in-house chips poses a challenge for smartphone brands, involving not only significant initial investments but also the navigation of various modules and architectures on the smartphone’s SoCs, including ISP and Modem. Balancing performance and power consumption optimally in specific application scenarios tests the R&D skills of designers, presenting a particularly challenging task for brands lacking relevant technological expertise. However, fueled by the ambition to “product differentiation” and “have a say in the market,” smartphone brands remain enthusiastic about venturing into in-house chips.

Smartphone Brands and SoC Dilemma

In current specialization, smartphone brands typically purchase SoC chips from IC design companies like Qualcomm or MediaTek. While they can fine-tune chip performance to suit the brand’s needs after purchase, the room for modification is quite limited.

Currently, smartphone product development is reaching maturity, and the market lacks innovation. For consumers, in the intensely competitive landscape, smartphones equipped with similar-level SoCs from Qualcomm may only differ in terms of “pricing” as a determining factor for purchase. If the market shifts into a price competition, it becomes unprofitable for smartphone brands.

Moreover, without the ability to develop in-house SoC, smartphone brands become dependent on IC design companies. If IC design companies alter their fee structures or take measures such as raising prices or adding licensing fees, brands have little choice but to comply, significantly impacting their profits.

As the central component of smartphones, if brands can design everything from scratch, it enables them to create product differentiation and gain a competitive edge. Although the initial investment is substantial, in the long run, it allows smartphone brands to have a say in the market.

Apple’s in-house SoC chip has become a significant standard for other smartphone brands in shaping their strategies. Examining Apple’s development trends, the success of the iPhone is largely attributed to Apple’s creation of powerful and efficient SoC chips.

Apple’s decision not to rely on IC design companies but to design chips in-house allowed iPhone to surpass other competing smartphone products. The key lies in Apple’s ability to plan for hardware and software from the ground up through its self-designed SoC architecture, achieving a high level of product differentiation. In addition to creating the most suitable SoC for the iPhone, it also solidifies a unique competitive advantage for Apple.

The Costly Pursuit on SoC          

However, venturing into in-house chips poses formidable challenges for smartphone brands. The primary hurdle lies in the necessity for a substantial financial investment. According to statistics from The New York Times, Apple invested about US$10 billion in developing the A4 chip, while Apple’s revenue at that time was approximately US$65 billion. At that time, the smartphone market was not saturated at that time and was still in the development stage, providing ample room for Apple’s growth.

Focus on the data, from 2010 to 2011, Apple’s revenue generated from selling iPhones grew from about US$25.2 billion to approximately US$45.9 billion, with a growth rate of about 82%. Apple’s revenue scale surpassed US$100 billion in 2012. With a huge and sufficient revenue scale support and the market still having growth potential, although self-developing chips require a large amount of investment, it is indeed feasible for Apple, whose iPhone business is thriving.

In the current mature and competitive smartphone market, creating product differentiation is the only way to break through. As most Chinese smartphone brands lack the technology to develop SoC, it becomes trending to adopt new strategy of developing in-house chips. Apart from self-developing SoC, some brands also choose to enter from the “specific function chip” on the smartphone.

Next Challenges in Plateauing Market

However, compared to the smartphone market situation when Apple initially turned to in-house SoC, current market has entered a plateau phase from the previous golden growth period. Brands find it difficult to generate sufficient revenue scale to support the high cost of in-house chips in the saturated and competitive market.

Moreover, with the continuous advancement of semiconductor process technology, the current cost to enter is much higher comparing to the past. Even with funds. Achieving in-house SoC involves a significant technical threshold, and it is challenging to bypass patents, especially when competitors have accumulated decades of experience.

Therefore, while the strategy of brands choosing to self-develop chips is likely to impact IC design companies like Qualcomm and MediaTek, its effects are expected to be limited. The reason is that for IC design companies like MediaTek and Qualcomm, they already occupy a place in the market with exclusive key technologies and accumulated intellectual property rights (IP), making it challenging for smartphone brands’ in-house chips to completely replace MediaTek and Qualcomm products.
(Image: Apple)