According to Bloomberg, Apple is quietly catching up with its competitors in the AI field. Observing Apple’s layout for the AI field, in addition to acquiring AI-related companies to gain relevant technology quickly, Apple is now developing its large language model (LLM).

TrendForce’s insights:

1. Apple’s Low-Profile Approach to AI: Seizing the Next Growth Opportunity

As the smartphone market matures, brands are not only focusing on hardware upgrades, particularly in camera modules, to stimulate device replacements, but they are also observing the emergence of numerous brands keen on introducing new AI functionalities in smartphones. This move is aimed at reigniting the growth potential of smartphones. Some Chinese brands have achieved notable progress in the AI field, especially in large language models.

For instance, Xiaomi introduced its large language model MiLM-6B, ranking tenth in the C-Eval list (a comprehensive evaluation benchmark for Chinese language models developed in collaboration with Tsinghua University, Shanghai Jiao Tong University, and the University of Edinburgh) and topping the list in its category in terms of parameters. Meanwhile, Vivo has launched the large model VivoLM, with its VivoLM-7B model securing the second position on the C-Eval ranking.

As for Apple, while it may appear to be in a mostly observatory role as other Silicon Valley companies like OpenAI release ChatGPT, and Google and Microsoft introduce AI versions of search engines, the reality is that since 2018, Apple has quietly acquired over 20 companies related to AI technology from the market. Apple’s approach is characterized by its extreme discretion, with only a few of these transactions publicly disclosing their final acquisition prices.

On another front, Apple has been discreetly developing its own large language model called Ajax. It commits daily expenditures of millions of dollars for training this model with the aim of making its performance even more robust compared to OpenAI’s ChatGPT 3.5 and Meta’s LLaMA.

2. Apple’s Advantage in Developing a Paid Subscription Model for Large Language Models Compared to Other Brands

Analyzing the current most common usage scenarios for smartphones among general consumers, these typically revolve around activities like taking photos, communication, and information retrieval. While there is potential to enhance user experiences with AI in some functionalities, these usage scenarios currently do not fall under the category of “essential AI features.”

However, if a killer application involving large language models were to emerge on smartphones in the future, Apple is poised to have an exclusive advantage in establishing such a service as a subscription-based model. This advantage is due to recent shifts in Apple’s revenue composition, notably the increasing contribution of “Service” revenue.

In August 2023, Apple CEO Tim Cook highlighted in Apple’s third-quarter financial report that Apple’s subscription services, which include Apple Arcade, Apple Music, iCloud, AppleCare, and others, had achieved record-breaking revenue and amassed over 1 billion paying subscribers.

In other words, compared to other smartphone brands, Apple is better positioned to monetize a large language model service through subscription due to its already substantial base of paying subscription users. Other smartphone brands may find it challenging to gain consumer favor for a paid subscription service involving large language models, as they lack a similarly extensive base of subscription users.

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• [News] Apple’s Exclusive AI Order Boosts Revenue via Foxconn’s FII Vietnam Plant

TSMC’s new plant in Kumamoto, Japan, is bustling. With more than a thousand employees hard at work, it is on track to commence mass production in 2024. This venture signifies TSMC’s commitment to meet customer demands and navigate geopolitical challenges by expanding its overseas production capabilities.

According to a report by Economic Daily, industry sources reveal that TSMC’s Kumamoto plant is making significant progress in terms of staffing. In August 2023, Taiwanese engineers arrived in Japan accompanied by their families. Simultaneously, locally recruited engineers have completed training and are being deployed to the Kumamoto plant in preparation for the 2024 production.

Notably, TSMC’s Kumamoto plant has successfully trained its workforce. When combined with local employees, the facility now boasts a workforce exceeding a thousand. For the latest Kumamoto plant updates, TSMC assures to refer to the information shared during the October 3Q23 earning conference.

In the prior conference, TSMC disclosed its construction of a cutting-edge wafer fab in Japan. This fab will employ 12/16 nm and 22/28 nm process technologies. TSMC has hired around 800 local employees, most of whom have gained valuable experience in Taiwan. Equipment installation began this month, and mass production is expected by late 2024 if all goes according to schedule.

TSMC’s Kumamoto plant is strongly supported by the Japanese government, Sony Semiconductor Solutions Corporation, Denso, and other partners. The plant’s total capital expenditure is $8.6 billion, and the Japanese Ministry of Economy, Trade and Industry approved a subsidy of 476 billion yen (about US$3.5 billion) in June, covering around 40% of the total Japanese subsidy amount.

The Japanese government is optimistic about TSMC introducing EUV lithography equipment for advanced process mass production in future plants. To secure TSMC’s expansion of the Kumamoto Plant, the government is intensifying its support, with discussions suggesting subsidies of up to 900 billion yen (about US$6.03 billion). This increase underscores Japan’s commitment to boosting domestic semiconductor production value, aligning with their 2030 goal. Companies like TSC, WAHLEE, and MA-tek are poised to expand in pursuit of this goal.

TSC established Shunkawa Co., Ltd. in Japan in 2022 and opened a Kumamoto office in August this year. TSC plans to closely monitor the evolution of new semiconductor plants and explore expansion opportunities in regions such as Tohoku and Hokkaido. Additionally, WAHLEE, a materials distributor, is actively partnering with original equipment manufacturers and Japanese trading companies to tap into the Japanese market.

(Image: TSMC)

As semiconductor manufacturing processes evolve more gradually, 3D packaging emerges as an effective means of prolonging Moore’s Law and enhancing the computational prowess of ICs. Within the realm of 3D stacking technology, the Interuniversity Microelectronics Centre (imec) based in Belgium categorizes 3D integration technologies into four distinct types, each determined by different partitioning locations within a chip: 3D-SIP, 3D-SIC, 3D-SOC, and 3D-IC. Based on our previous discussion of 3D-SIP and 3D-SIC stacking, this article places a spotlight on the other two technologies: 3D-SOC and 3D-IC.

Related Article: Differences Between 3D-SIP and 3D-SIC: Why Are TSMC, Intel, and Samsung All Actively Involved?

3D-SOC

A System on Chip (SOC) involves the redesign of several different chips, all fabricated using the same manufacturing process, and integrates them onto a single chip. 3D-SOC takes this concept to new heights by stacking multiple SOC chips vertically. The image below illustrates the transformation of a 2D System on Chip (2D-SOC), where circuits are redivided into blocks, and then stacked to form a 3D System on Chip (3D-SOC).

Source: imec

imec’s research team previously published a paper on IEEE, outlining the advantages of 3D-SOC and backside interconnects. This technology aims to achieve the integration of diverse chips in a heterogeneous system. By intelligently partitioning circuits, it significantly reduces power consumption and boosts computational performance. In comparison to the trending chiplet technology, 3D-SOC holds a competitive edge.

Eric Beyne, IMEC’s Vice President of Research and Project Director for 3D System Integration, pointed out, “Chiplets involve separately designed and processed chiplet dies. A well-known example are high-bandwidth memories (HBMs) – stacks of dynamic random access memory (DRAM) chips. This memory stack connects to a processor chip through interface buses, which limit their use to latency-tolerant applications. As such, the chiplet concept will never allow for fast access between logic and first and intermediate level cache memories.”

However, it’s essential to acknowledge that 3D-SOC technology comes with apparent drawbacks, primarily higher research and development costs and a longer development timeline compared to 3D-SIP technology. Nevertheless, as applications like AIGC, AR/VR, 8K, and others continue to drive the need for high-speed computing, chips are relentlessly progressing towards higher efficiency, lower power consumption, and smaller size. In this context, 3D-SOC technology will maintain its place in advanced packaging.

Backside Power Delivery Network (BSPDN)

The technology of Backside Power Delivery Network (BSPDN) represents a pivotal development in semiconductor manufacturing, offering several advantages, including more flexible circuit design, shorter metal wire lengths, and higher chip utilization. After transforming a 2D System on Chip (2D-SOC) into a 3D-SOC through layered stacking, the original back sides of the chips become the outer sides of the 3D-SOC. At this stage, the “freed-up” backside of the chips can be utilized for signal routing or as power lines for transistors, in contrast to traditional processes where wiring and power lines are designed on the front side of the wafer.

In the past, backside chips were merely used as carriers, but BSPDN technology allows for more space to be used for logic wafer design. According to simulation results, the transmission efficiency of backside PDN is seven times higher than traditional front-side PDN. Intel has also announced the introduction of this technology in the 20Å and 18Å processes.

To achieve BSPDN, a dedicated wafer thinning process (reducing it to a few hundred nanometers) is required, along with nanoscale through-silicon vias (nTSV) to connect backside power to the front-side logic chip.

Another key technology for BSPDN is the Buried Power Rail (BPR), a miniaturization technique that embeds wires beneath the transistors, with some inside the silicon substrate and others in shallow trench isolation oxide layers. BPR replaces power lines and ground lines under standard cells in traditional processes and further reduces the width of standard cells, mitigating IR voltage drop issues.

The diagram below illustrates BSPDN, where backside PDN’s metal wiring is connected to Buried Power Rails (BPR), and the backside of the chip (BS) is connected to the front side of the logic chip (FS).

Source: imec

3D-IC

The final category, 3D-IC, employs new 3D sequential technology (S3D) or Monolithic technology to vertically stack n-type and p-type transistors, forming a Complementary Field-Effect Transistor (CFET). This technology enables two transistors to be stacked and integrated into the size of a single transistor. This not only significantly increases transistor density but also simplifies the layout of CMOS logic circuits, enhancing design efficiency. As seen in the diagram below, n-type and p-type transistors are integrated vertically to form a CFET.

Source: imec

Nevertheless, the key challenge lies in how to vertically integrate each minuscule transistor and address heat dissipation issues under high-speed computing. Major manufacturers are still in the development phase, but the technology’s biggest advantage lies in achieving the highest component density and the smallest node width, even without nodes. With the continuous increase in demand for high-speed computing, 3D-IC technology is set to become a focal point in the industry’s development.

3D Stacking Leading the Global Semiconductor Advancement

imec has outlined a roadmap for 3D stacking, aiming to reduce pitch spacings and increase point density within unit areas. However, imec also emphasizes that the development of 3D packaging technologies does not follow a linear timeline, as depicted in the figure above, as there is no single packaging technology that can cater to all requirements.

With the rapid development of applications such as AIGC, AR/VR, 8K, 5G, and others, a significant demand for computing power is expected to persist. To overcome the bottlenecks in semiconductor process technology, countries worldwide are fully engaged in advanced packaging research, and 3D stacking undoubtedly takes the center stage as the elixir for Moore’s Law continuation.

Explore More

• An In-Depth Explanation of Advanced Packaging Technology: CoWoS
• Intel and Samsung Join TSMC in Fierce Advanced Packaging Race
• Continuing Moore’s Law: Advanced Packaging Enters the 3D Stacked CPU/GPU Era
• Understanding Chiplets, SoC, and SiP: Why TSMC, Intel, Samsung Invest?

(Image: Samsung)

Foxconn Technology Group held its Tech Day on October 18, 2023, focusing on three key areas: AI Smart Factories, CDMS (Contract Design and Manufacturing Services), and Model N.

TrendForce’s insights:

1. Increasing EV Adoption Crucial for Sustained Growth

According to an intention survey by Gallup in April 2023, only 4% of respondents in the United States currently use electric vehicles, with an additional 12% considering a purchase. The majority of potential buyers in this category belong to households with an annual income exceeding $100,000. As per the salary survey by the New York Federal Reserve in July 2023, the average annual income for full-time employees in the United States stands at approximately $69,475.

Apart from concerns about driving range, the primary obstacle to the widespread adoption of electric vehicles is their relatively higher cost compared to traditional gasoline-powered vehicles. This pricing differential limits the consumer base for electric vehicles. The growth rate in electric vehicle adoption, which nearly doubled from 2020 to 2023, now faces a “30% plateau” challenge.

With the deadlines for banning gasoline cars in 2025 in Norway and 2035 in the European Union approaching, reducing manufacturing costs to reach a broader consumer demographic will be a critical factor in the successful transition of traditional automakers.

2. Foxconn’s CDMS Model Offers Cost Savings and Addresses Key EV Challenges

Take Volkswagen, the world’s second-largest automaker, for example. The investment in creating the MEB platform for their EVs amounted to approximately $7 billion. For many small or startup automakers, this figure is astronomical.

Furthermore, in recent years, automakers have made substantial investments to ensure the stability of crucial components like batteries and semiconductor chips. These costs are inevitably spread across the overall vehicle cost, which, in turn, affects the growth rate of electric vehicles.

The CDMS  model leverages Foxconn’s Model series of complete vehicle platform production lines. It combines modular component assembly and supply chain resources to offer car manufacturers a comprehensive development service, reducing their upfront development time and costs. This enables manufacturers to concentrate on brand marketing.

Foxconn’s active push into CDMS may prompt many traditional automakers to reevaluate the core value of in-house manufacturing, reduce costs, and expand their customer base, offering a solution to the current challenges faced by the industry.

3. While Automakers Predominantly Continue to Independently Develop Platforms, Foxconn Must Expedite Its Efforts to Compete for Next-Generation Platform Manufacturing Opportunities

Despite the considerable costs associated with platform development, many automakers have already invested resources in creating their initial NEP (New Electric Platform). In the early stages of new energy vehicle development, it attracted various capital investments, with ample development funding and a relatively high fault tolerance.

Consequently, many automakers boldly invested in building their dedicated platforms. However, as market competition intensifies, automakers are likely to exercise greater caution in various investments.

For some automakers, the timing to reintroduce the CDMS model for the next-generation platform planning could be optimal for Foxconn to make its entry. However, outsourcing the production of new energy vehicles may entail sacrificing their uniqueness, which can influence the types and quantities of vehicles that automakers are willing to outsource.

Moreover, automakers tend to be more conservative compared to the electronics industry, and they might have concerns that outsourcing to Foxconn could inadvertently nurture potential competitors.

Furthermore, if automakers only view outsourcing as a financial adjustment or a temporary strategy, the sustainability of such orders becomes uncertain.

While the Luxgen N7, built on the Model C platform under the CDMS approach, has achieved promising results in its presale, marking a successful initial step, expanding the economies of scale for CDMS will require Foxconn to seize the right timing to secure more outsourcing orders from international automakers.

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• [News] Foxconn Chairman Discusses Competitive Strategy in EV Industry

On the 25th of October, the European Commission announced that, through a sampling method, it has selected three Chinese automakers: BYD, SAIC Motor, and Geely, to initiate an anti-subsidy investigation.

The EU had previously declared its intent to investigate electric vehicles originating from China earlier this month. However, due to the multitude of companies involved, the European Commission resorted to a sampling method to determine the specific targets of this inquiry.

This report was initially revealed by the trade publication “MLex,” which claimed that the EU seeks to establish a fair competitive environment for European electric vehicle manufacturers.

Furthermore, according to the South China Morning Post, despite Tesla shipping more electric cars from China to Europe compared to any other company, it is not among the companies being investigated by the European Union.

Additionally, if the EU’s investigation uncovers “subsidy evidence,” it will result in the calculation of corresponding “average anti-subsidy taxes,” which will apply to all electric vehicles imported from China, including prominent models produced in China such as Volkswagen, Tesla, BMW, and others. The three companies selected through the sampling method mentioned earlier will bear “individual responsibility” based on their respective subsidies.

BYD’s Executive Vice President, Stella Li, recently stated that despite the EU launching an anti-subsidy investigation into Chinese electric vehicles, BYD remains committed to driving strong growth for the company in Europe.

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• [News] BYD and BYD Electronic Expect Profits to More Than Double in the First Three Quarters

(Photo credit: BYD)