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[Selected Topics] FOPLP to Accommodate Different Types of Suppliers with Market Segmentation

2024/09/04

Semiconductors

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(a) incentives for chip makers to adopt FOPLP solution: AI GPU makers pursuing chip packaging size expansion could adopt chip-last solution, while power IC and RF IC makers pursuing packaging cost reduction could adopt chip-first solution. The segmented market could accommodate different types of suppliers. (b) development of FOPLP solution by foundry: expanding chip packaging size of 2.5D packaging for AI GPU from wafer level to panel level. (c) development of FOPLP solution by OSATs: migrating from power IC and RF IC to CPU and GPU, enabling multi-chip packaging. (d) development of FOPLP solution by panel makers: entry into chip packaging business, supported by licencers.

Report
AMD and NVIDIA Take the Lead in Transitioning to FOPLP for PC CPU, PMIC, and AI GPU to Reduce Cost and Expand Packaging Sizes of Large-Sized Chips

2024/06/27

DRAM , NAND Flash +2

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As indicated by the survey of global market intelligence firm TrendForce, chip suppliers such as AMD have been actively involved in negotiations with TSMC and OSAT throughout 2Q24...

Report
[Selected Topics] AMD and NVIDIA Take the Lead in Transitioning to FOPLP for PC CPU, PMIC, and AI GPU to Reduce Cost and Expand Packaging Sizes of Large-Sized Chips

2024/06/27

Semiconductors , Computer System

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As indicated by the survey of global market intelligence firm TrendForce, chip suppliers such as AMD have been actively involved in negotiations with TSMC and OSAT throughout 2Q24 on chip packaging using the FOPLP technology, with major partnership models and items shown below: Model 1: OSATs transitioning from traditional packaging method to FOPLP when packaging consumer ICs: AMD is currently negotiating with PTI and ASE on PC CPUs, whereas Qualcomm is talking it over with ASE on PMIC. Prior to this wave of demand, MediaTek had been worked with PTI on PMIC, while Qualcomm was already a partner of ASE pertaining to PMIC. Model 2: foundries and OSATs transitioning from 2.5D wafer level to panel level when packaging AI GPUs: AMD and NVIDIA are currently negotiating with TSMC and SPIL on packaging AI GPUs by switching from the existing 2.5D wafer level to panel level, followed by an expansion in chip packaging sizes. Model 3: panel providers packaging consumer ICs: NXP and STMicroelectronics are negotiating with Innolux on PMIC products.

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